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算法自组装过程中,冗余度呈指数级增加可显著降低错误率。

Increasing Redundancy Exponentially Reduces Error Rates during Algorithmic Self-Assembly.

机构信息

†Computation and Neural Systems, California Institute of Technology, Pasadena, California 91125, United States.

‡Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, United States.

出版信息

ACS Nano. 2015 Jun 23;9(6):5760-71. doi: 10.1021/nn507493s. Epub 2015 May 12.

Abstract

While biology demonstrates that molecules can reliably transfer information and compute, design principles for implementing complex molecular computations in vitro are still being developed. In electronic computers, large-scale computation is made possible by redundancy, which allows errors to be detected and corrected. Increasing the amount of redundancy can exponentially reduce errors. Here, we use algorithmic self-assembly, a generalization of crystal growth in which the self-assembly process executes a program for growing an object, to examine experimentally whether redundancy can analogously reduce the rate at which errors occur during molecular self-assembly. We designed DNA double-crossover molecules to algorithmically self-assemble ribbon crystals that repeatedly copy a short bitstring, and we measured the error rate when each bit is encoded by 1 molecule, or redundantly encoded by 2, 3, or 4 molecules. Under our experimental conditions, each additional level of redundancy decreases the bitwise error rate by a factor of roughly 3, with the 4-redundant encoding yielding an error rate less than 0.1%. While theory and simulation predict that larger improvements in error rates are possible, our results already suggest that by using sufficient redundancy it may be possible to algorithmically self-assemble micrometer-sized objects with programmable, nanometer-scale features.

摘要

虽然生物学证明分子可以可靠地传递信息和进行计算,但在体外实现复杂分子计算的设计原则仍在不断发展。在电子计算机中,通过冗余来实现大规模计算,从而可以检测和纠正错误。增加冗余量可以使错误率呈指数级降低。在这里,我们使用算法自组装,这是晶体生长的一种推广,其中自组装过程执行一个用于生长物体的程序,来实验检验冗余是否可以类似地降低分子自组装过程中错误的发生速度。我们设计了双交叉 DNA 分子,使其通过算法自组装成带状晶体,这些晶体可以重复复制一个短的位串,我们测量了当每个位由 1 个分子编码或由 2、3 或 4 个分子冗余编码时的错误率。在我们的实验条件下,每增加一级冗余可将位错误率降低约 3 倍,而 4 级冗余编码的错误率低于 0.1%。虽然理论和模拟预测错误率可以有更大的提高,但我们的结果已经表明,通过使用足够的冗余,可能可以通过算法自组装具有可编程、纳米级特征的微米级物体。

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