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室温下同时实现近理想亚阈值摆幅和高空穴迁移率的黑磷基场效应晶体管。

Black Phosphorus Based Field Effect Transistors with Simultaneously Achieved Near Ideal Subthreshold Swing and High Hole Mobility at Room Temperature.

作者信息

Liu Xinke, Ang Kah-Wee, Yu Wenjie, He Jiazhu, Feng Xuewei, Liu Qiang, Jiang He, Wen Jiao, Lu Youming, Liu Wenjun, Cao Peijiang, Han Shun, Wu Jing, Liu Wenjun, Wang Xi, Zhu Deliang, He Zhubing

机构信息

College of Materials Science and Engineering, Shenzhen Key Laboratory of Special Functional Materials, Nanshan District Key Lab for Biopolymer and Safety Evaluation, Shenzhen University, 3688 Nanhai Ave, Shenzhen, 518060, People Republic of China.

Department of Electrical and Computer Engineering, National University of Singapore, 4 Engineering Drive 3, 117583, Singapore.

出版信息

Sci Rep. 2016 Apr 22;6:24920. doi: 10.1038/srep24920.

Abstract

Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate a near ideal subthreshold swing (SS) of ~69 mV/dec and a room temperature hole mobility of exceeding >400 cm(2)/Vs. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously reported BP transistors realized on traditional SiO2 gate dielectric. X-ray photoelectron spectroscopy (XPS) analysis further reveals the evidence of a more chemically stable BP when formed on HfO2 high-k as opposed to SiO2, which gives rise to a better interface quality that accounts for the SS and hole mobility improvement. These results unveil the potential of black phosphorus as an emerging channel material for future nanoelectronic device applications.

摘要

黑磷(BP)因其优异的载流子传输特性,已成为下一代晶体管应用中一种很有前景的二维(2D)材料。在诸多问题中,同时实现降低亚阈值摆幅和提高空穴迁移率仍是一项挑战,这需要对BP/栅极氧化物界面进行仔细优化。在此,我们报告了使用低温CMOS工艺实现的集成HfO2高k栅极电介质的高性能BP晶体管。所制造的器件显示出接近理想的亚阈值摆幅(SS),约为69 mV/dec,室温空穴迁移率超过400 cm²/Vs。这些品质因数堪称同类最佳,优于先前在传统SiO2栅极电介质上实现的BP晶体管。X射线光电子能谱(XPS)分析进一步揭示,与SiO2相比,在HfO2高k上形成的BP化学稳定性更高,这导致界面质量更好,从而解释了SS和空穴迁移率的提高。这些结果揭示了黑磷作为未来纳米电子器件应用中新兴沟道材料的潜力。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/5026/4840359/0ad47f6b38e7/srep24920-f1.jpg

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