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原子层沉积原位种子层法制备石墨烯上 AlO 薄膜的界面电学性能

Interface Electrical Properties of AlO Thin Films on Graphene Obtained by Atomic Layer Deposition with an in Situ Seedlike Layer.

机构信息

Consiglio Nazionale delle Ricerche, Istituto per la Microelettronica e Microsistemi , Strada VIII, n. 5, Zona Industriale, 95121 Catania, Italy.

STMicroelectronics , Stradale Primosole 50, Zona Industriale, 95121 Catania, Italy.

出版信息

ACS Appl Mater Interfaces. 2017 Mar 1;9(8):7761-7771. doi: 10.1021/acsami.6b15190. Epub 2017 Feb 13.

Abstract

High-quality thin insulating films on graphene (Gr) are essential for field-effect transistors (FETs) and other electronics applications of this material. Atomic layer deposition (ALD) is the method of choice to deposit high-κ dielectrics with excellent thickness uniformity and conformal coverage. However, to start the growth on the sp Gr surface, a chemical prefunctionalization or the physical deposition of a seed layer are required, which can effect, to some extent, the electrical properties of Gr. In this paper, we report a detailed morphological, structural, and electrical investigation of AlO thin films grown by a two-steps ALD process on a large area Gr membrane residing on an AlO-Si substrate. This process consists of the HO-activated deposition of a AlO seed layer a few nanometers in thickness, performed in situ at 100 °C, followed by ALD thermal growth of AlO at 250 °C. The optimization of the low-temperature seed layer allowed us to obtain a uniform, conformal, and pinhole-free AlO film on Gr by the second ALD step. Nanoscale-resolution mapping of the current through the dielectric by conductive atomic force microscopy (CAFM) demonstrated an excellent laterally uniformity of the film. Raman spectroscopy measurements indicated that the ALD process does not introduce defects in Gr, whereas it produces a partial compensation of Gr unintentional p-type doping, as confirmed by the increase of Gr sheet resistance (from ∼300 Ω/sq in pristine Gr to ∼1100 Ω/sq after AlO deposition). Analysis of the transfer characteristics of Gr field-effect transistors (GFETs) allowed us to evaluate the relative dielectric permittivity (ε = 7.45) and the breakdown electric field (E = 7.4 MV/cm) of the AlO film as well as the transconductance and the holes field-effect mobility (∼1200 cm V s). A special focus has been given to the electrical characterization of the AlO-Gr interface by the analysis of high frequency capacitance-voltage measurements, which allowed us to elucidate the charge trapping and detrapping phenomena due to near-interface and interface oxide traps.

摘要

高质量的薄绝缘膜对于石墨烯(Gr)的场效应晶体管(FET)和其他电子应用至关重要。原子层沉积(ALD)是沉积具有优异厚度均匀性和共形覆盖的高κ电介质的首选方法。然而,为了在 sp Gr 表面开始生长,需要进行化学预官能化或物理沉积种子层,这在某种程度上会影响 Gr 的电性能。在本文中,我们报告了在 AlO-Si 衬底上大面积 Gr 膜上通过两步 ALD 工艺生长的 AlO 薄膜的详细形态、结构和电学研究。该过程包括在 100°C 下原位进行的厚度为数纳米的 HO 激活的 AlO 种子层沉积,然后在 250°C 下进行 ALD 热生长 AlO。低温种子层的优化使我们能够通过第二 ALD 步骤在 Gr 上获得均匀、共形且无针孔的 AlO 薄膜。通过导电原子力显微镜(CAFM)对介电层中的电流进行纳米级分辨率映射,证明了薄膜具有优异的横向均匀性。拉曼光谱测量表明,ALD 过程不会在 Gr 中引入缺陷,而是会部分补偿 Gr 非故意的 p 型掺杂,这一点得到了 Gr 薄层电阻增加的证实(在原始 Gr 中约为 300 Ω/sq,在 AlO 沉积后约为 1100 Ω/sq)。Gr 场效应晶体管(GFET)的传输特性分析允许我们评估 AlO 薄膜的相对介电常数(ε=7.45)和击穿电场(E=7.4 MV/cm),以及跨导和空穴场效应迁移率(约 1200 cm V s)。特别关注了通过高频电容-电压测量分析对 AlO-Gr 界面的电学特性进行了研究,这使得我们能够阐明由于近界面和界面氧化物陷阱引起的电荷俘获和去俘获现象。

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