Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM) , Strada VIII, No. 5, Zona Industriale, 95121 Catania, Italy.
STMicroelectronics , Stradale Primosole 50, 95121 Catania, Italy.
ACS Appl Mater Interfaces. 2017 Oct 11;9(40):35383-35390. doi: 10.1021/acsami.7b08935. Epub 2017 Sep 26.
In this work, the conduction mechanisms at the interface of AlN/SiN dielectric stacks with AlGaN/GaN heterostructures have been studied combining different macroscopic and nanoscale characterizations on bare materials and devices. The AlN/SiN stacks grown on the recessed region of AlGaN/GaN heterostructures have been used as gate dielectric of hybrid metal-insulator-semiconductor high electron mobility transistors (MISHEMTs), showing a normally-off behavior (V = +1.2 V), high channel mobility (204 cm V s), and very good switching behavior (I/I current ratio of (5-6) × 10 and subthreshold swing of 90 mV/dec). However, the transistors were found to suffer from a positive shift of the threshold voltage during subsequent bias sweeps, which indicates electron trapping in the dielectric stack. To get a complete understanding of the conduction mechanisms and of the charge trapping phenomena in AlN/SiN films, nanoscale current and capacitance measurements by conductive atomic force microscopy (C-AFM) and scanning capacitance microscopy (SCM) have been compared with a macroscopic temperature-dependent characterization of gate current in MIS capacitors. The nanoscale electrical analyses showed the presence of a spatially uniform distribution of electrons trapping states in the insulator and the occurrence of a density of 7 × 10 cm of local and isolated current spots at high bias values. These nanoscale conductive paths can be associated with electrically active defects responsible for the trap-assisted current transport mechanism through the dielectric, observed by the temperature-dependent characterization of the gate current. The results of this study can be relevant for future applications of AlN/SiN bilayers in GaN hybrid MISHEMT technology.
在这项工作中,我们通过对裸材料和器件进行不同的宏观和纳米尺度的表征,研究了具有 AlGaN/GaN 异质结构的 AlN/SiN 介质叠层界面的传导机制。在 AlGaN/GaN 异质结构的凹陷区域上生长的 AlN/SiN 叠层已被用作混合金属-绝缘体-半导体高电子迁移率晶体管(MISHEMT)的栅介质,表现出正常关断行为(V = +1.2 V)、高沟道迁移率(204 cm V s)和非常好的开关性能(I/I 电流比为(5-6)×10 和亚阈值摆幅为 90 mV/dec)。然而,我们发现晶体管在随后的偏压扫描过程中会出现阈值电压的正向漂移,这表明介质叠层中有电子俘获。为了全面了解 AlN/SiN 薄膜的传导机制和电荷俘获现象,我们通过导电原子力显微镜(C-AFM)和扫描电容显微镜(SCM)进行了纳米尺度的电流和电容测量,并与 MIS 电容器的栅电流的宏观温度相关特性进行了比较。纳米尺度的电分析表明,在绝缘体中存在电子俘获态的空间均匀分布,并且在高偏压值下会出现密度为 7×10 cm 的局部和孤立电流点。这些纳米尺度的导电路径可以与电活性缺陷相关联,这些缺陷负责通过介质的陷阱辅助电流传输机制,这可以通过栅电流的温度相关特性观察到。这项研究的结果对于未来在 GaN 混合 MISHEMT 技术中应用 AlN/SiN 双层具有重要意义。