Adimulam Mahesh Kumar, Divya A, Tejaswi K, Srinivas M B
Annu Int Conf IEEE Eng Med Biol Soc. 2017 Jul;2017:3844-3847. doi: 10.1109/EMBC.2017.8037695.
A low power Programmable Analog Front End (PAFE) for biopotential measurements is presented in this paper. The PAFE circuit processes electrocardiogram (ECG), electromyography (EMG) and electroencephalogram (EEG) signals with higher accuracy. It consists mainly of improved transconductance programmable gain instrumentational amplifier (PGIA), programmable high pass filter (PHPF), and second order low pass filter (SLPF). A 15-bit programmable 5-stage successive approximation analog-to-digital converter (SAR-ADC) is implemented for improving the performance, whose power consumption is reduced due to multiple stages and by OTA/Comparator sharing technique between the stages. The power consumption is further reduced by operating the analog portion of PAFE on 0.5V supply voltage and digital portion on 0.3V supply voltage generated internally through a voltage regulator. The proposed low power PAFE has been fabricated in 180nm standard CMOS process. The performance parameters of PAFE in 15-bit mode are found to be, gain of 31-70 dB, input referred noise of 1.15 μVrms, CMRR of 110 dB, PSRR of 104 dB, and signal-to-noise distortion ratio (SNDR) of 83.5dB. The power consumption of the design is 1.1 μW @ 0.5 V supply voltage and it occupies a core silicon area of 1.2 mm.
本文介绍了一种用于生物电位测量的低功耗可编程模拟前端（PAFE）。该PAFE电路能更精确地处理心电图（ECG）、肌电图（EMG）和脑电图（EEG）信号。它主要由改进的跨导可编程增益仪表放大器（PGIA）、可编程高通滤波器（PHPF）和二阶低通滤波器（SLPF）组成。实现了一个15位可编程5级逐次逼近型模数转换器（SAR-ADC）以提高性能，由于采用了多级结构以及各级之间的OTA/比较器共享技术，其功耗得以降低。通过将PAFE的模拟部分工作在0.5V电源电压下，数字部分工作在通过电压调节器内部产生的0.3V电源电压下，进一步降低了功耗。所提出的低功耗PAFE已采用180nm标准CMOS工艺制造。15位模式下PAFE的性能参数为：增益31 - 70dB，输入参考噪声1.15μVrms，共模抑制比110dB，电源抑制比104dB，信噪失真比（SNDR）83.5dB。该设计在0.5V电源电压下的功耗为1.1μW，其核心硅面积为1.2mm²。
