School of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 34141, Republic of Korea.
Nanotechnology. 2018 Jan 1;29(2):025201. doi: 10.1088/1361-6528/aa9a69.
First-principles density functional theory (DFT) based device simulations are performed for Si ultra-thin-body (UTB) field effect transistors with the explicit SiO atoms in the gate dielectric. In order to evaluate the Si/SiO interface stress effects on the UTB device performance, the interface stress tensor is extracted from the Si/SiO atomic structure by DFT calculations. The influence of the interface stress on the transport properties is examined through full quantum mechanical non-equilibrium Green's function calculations. Based on the analysis of the band structure and transfer characteristics, we demonstrate that the interface stress can characterize the overall effects of the SiO gate dielectric on the device performance in the nanoscale regime.
基于第一性原理密度泛函理论(DFT)的器件模拟是针对具有明确定义的 SiO 原子的栅介质的 Si 超薄体(UTB)场效应晶体管进行的。为了评估 Si/SiO 界面应力对 UTB 器件性能的影响,通过 DFT 计算从 Si/SiO 原子结构中提取界面应力张量。通过全量子力学非平衡格林函数计算来研究界面应力对输运性质的影响。基于能带结构和转移特性的分析,我们证明界面应力可以在纳米尺度范围内描述 SiO 栅介质对器件性能的综合影响。