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介质界面对 MoS 晶体管性能的影响。

Effect of Dielectric Interface on the Performance of MoS Transistors.

机构信息

Wuhan National High Magnetic Field Center and School of Electrical and Electronic Engineering and ‡Wuhan National High Magnetic Field Center and School of Optical and Electronic Information, Huazhong University of Science and Technology , Wuhan 430074, China.

出版信息

ACS Appl Mater Interfaces. 2017 Dec 27;9(51):44602-44608. doi: 10.1021/acsami.7b14031. Epub 2017 Dec 14.

Abstract

Because of their wide bandgap and ultrathin body properties, two-dimensional materials are currently being pursued for next-generation electronic and optoelectronic applications. Although there have been increasing numbers of studies on improving the performance of MoS field-effect transistors (FETs) using various methods, the dielectric interface, which plays a decisive role in determining the mobility, interface traps, and thermal transport of MoS FETs, has not been well explored and understood. In this article, we present a comprehensive experimental study on the effect of high-k dielectrics on the performance of few-layer MoS FETs from 300 to 4.3 K. Results show that AlO/HfO could boost the mobility and drain current. Meanwhile, MoS transistors with AlO/HfO demonstrate a 2× reduction in oxide trap density compared to that of the devices with the conventional SiO substrate. Also, we observe a negative differential resistance effect on the device with 1 μm-channel length when using conventional SiO as the gate dielectric due to self-heating, and this is effectively eliminated by using the AlO/HfO gate dielectric. This dielectric engineering provides a highly viable route to realizing high-performance transition metal dichalcogenide-based FETs.

摘要

由于二维材料具有较宽的能带隙和超薄的体性质,目前正在追求将其应用于下一代电子和光电子领域。尽管已经有越来越多的研究采用各种方法来提高 MoS 场效应晶体管 (FET) 的性能,但在决定 MoS FET 的迁移率、界面陷阱和热输运方面起着决定性作用的介电界面尚未得到很好的探索和理解。在本文中,我们从 300 到 4.3 K 对高 k 电介质对少层 MoS FET 性能的影响进行了全面的实验研究。结果表明,AlO/HfO 可以提高迁移率和漏极电流。同时,与使用传统 SiO 衬底的器件相比,具有 AlO/HfO 的 MoS 晶体管的氧化物陷阱密度降低了 2 倍。此外,当使用传统 SiO 作为栅介质时,我们观察到具有 1 μm 沟道长度的器件存在负微分电阻效应,这是由于自加热引起的,而通过使用 AlO/HfO 栅介质可以有效地消除这种效应。这种介电工程为实现高性能过渡金属二卤化物基 FET 提供了一条可行的途径。

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