Ahn Tea Jun, Yu Yun Seop
Department of Electrical, Electronic and Control Engineering and IITC, Hankyong National University, Anseong 17579, Korea.
J Nanosci Nanotechnol. 2018 Sep 1;18(9):5887-5892. doi: 10.1166/jnn.2018.15579.
Two types of Ge/Si-based novel tunnel field-effect transistors (TFETs) with source pockets are proposed. In the proposed Ge/Si-based TFETs, the materials in the source, channel, and drain are Ge, Si, and Si, respectively, and the gate shortly overlaps the source. One of the proposed TFETs has an intrinsic Ge pocket and the other has an intrinsic Si pocket, shallowly doped in the source region below the source-overlapped gate. The current-voltage (I-V) characteristics of the proposed Ge/Si-based TFETs were simulated using the TCAD device simulator, and were compared with those of Si, Ge, and Ge (in source)/Si (in channel and drain) TFETs. The on-currents (ION) of the proposed Ge/Si-based TFETs and Ge-TFET were higher, but the subthreshold swing (SS) of the Ge/Si-based TFET with the Ge source pocket was the worst, owing to the hump effect. The off-current (IOFF) of the Ge-based TFET was the worst, but those of the other devices were the same because their drain material was Si, with a larger band gap than Ge. The SS of the proposed Ge/Si-based TFET with a Si source pocket was the best, because the tunneling length of the Ge/Si heterojunction was the shortest, as shown by the simulated energy band. Defect-induce degradation due to large lattice mismatch between Si and Ge materials is investigated including the trap-assisted-tunneling (TAT) model. Overall, the proposed Ge/Si-based TFET with a Si source pocket demonstrated the best performance.
提出了两种具有源极口袋的基于锗/硅的新型隧道场效应晶体管(TFET)。在所提出的基于锗/硅的TFET中,源极、沟道和漏极中的材料分别为锗、硅和硅,且栅极与源极有短重叠。所提出的TFET中的一种具有本征锗口袋,另一种具有本征硅口袋,在源极重叠栅极下方的源极区域中进行浅掺杂。使用TCAD器件模拟器对所提出的基于锗/硅的TFET的电流-电压(I-V)特性进行了模拟,并与硅、锗以及锗(源极)/硅(沟道和漏极)TFET的特性进行了比较。所提出的基于锗/硅的TFET和锗基TFET的导通电流(ION)较高,但由于驼峰效应,具有锗源极口袋的基于锗/硅的TFET的亚阈值摆幅(SS)最差。锗基TFET的关断电流(IOFF)最差,但其他器件的关断电流相同,因为它们的漏极材料是硅,其带隙比锗大。具有硅源极口袋的所提出的基于锗/硅的TFET的SS最佳,因为如模拟能带所示,锗/硅异质结的隧穿长度最短。研究了由于硅和锗材料之间的大晶格失配导致的缺陷诱导退化,包括陷阱辅助隧穿(TAT)模型。总体而言,所提出的具有硅源极口袋的基于锗/硅的TFET表现出最佳性能。