具有增强双栅和部分P埋层的超低比导通电阻横向双扩散金属氧化物半导体晶体管。

Ultra-Low Specific On-resistance Lateral Double-Diffused Metal-Oxide-Semiconductor Transistor with Enhanced Dual-Gate and Partial P-buried Layer.

作者信息

Wang Zhuo, Yuan Zhangyi'an, Zhou Xin, Qiao Ming, Li Zhaoji, Zhang Bo

机构信息

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, 610054, Sichuan, China.

出版信息

Nanoscale Res Lett. 2019 Jan 28;14(1):38. doi: 10.1186/s11671-019-2866-5.

DOI:10.1186/s11671-019-2866-5

PMID:30689063

原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC6890875/

Abstract

An ultra-low specific on-resistance (R) lateral double-diffused metal-oxide-semiconductor transistor (LDMOS) with enhanced dual-gate and partial P-buried layer is proposed and investigated in this paper. On-resistance analytical model for the proposed LDMOS is built to provide an in-depth insight into the relationship between the drift region resistance and the channel region resistance. N-buried layer is introduced under P-well to provide a low-resistance conduction path and reduce the resistance of the channel region significantly. Enhanced dual-gate structure is formed by N-buried layer while avoiding the vertical punch-through breakdown in off-state. Partial P-buried layer with optimized length is adopted under the N-drift region to extend vertical depletion region and relax the electric field peak in off-state, which enhances breakdown voltage (BV) with low drift region resistance. For the LDMOS with enhanced dual-gate and partial P-buried layer, the result shows that R is 8.5 mΩ·mm while BV is 43 V.

摘要

本文提出并研究了一种具有增强型双栅和部分P埋层的超低比导通电阻（R）横向双扩散金属氧化物半导体晶体管（LDMOS）。建立了所提出的LDMOS的导通电阻分析模型，以深入了解漂移区电阻与沟道区电阻之间的关系。在P阱下方引入N埋层，以提供低电阻传导路径并显著降低沟道区电阻。N埋层形成增强型双栅结构，同时避免关断状态下的垂直穿通击穿。在N漂移区下方采用具有优化长度的部分P埋层，以扩展垂直耗尽区并缓解关断状态下的电场峰值，从而在低漂移区电阻的情况下提高击穿电压（BV）。对于具有增强型双栅和部分P埋层的LDMOS，结果表明R为8.5 mΩ·mm，而BV为43 V。