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一种具有高共模抑制比和电源抑制比的低功耗、低噪声多功能斩波放大器。

A Low-power and Low-noise Multi-purpose Chopper Amplifier with High CMRR and PSRR.

作者信息

Shad Erwin, Molinas Marta, Ytterdal Trond

出版信息

Annu Int Conf IEEE Eng Med Biol Soc. 2020 Jul;2020:3998-4001. doi: 10.1109/EMBC44109.2020.9176224.

DOI:10.1109/EMBC44109.2020.9176224
PMID:33018876
Abstract

In this article, by choosing and optimizing suitable structure in each stage, we have designed a multi-purpose low noise chopper amplifier. The proposed neural chopper amplifier with high CMRR and PSRR is suitable for EEG, LFP and AP signals while it has a low NEF. In order to minimize the noise and increase the bandwidth, a single stage current reuse amplifier with pseudo-resistor common-mode feedback is chosen, while a simple fully differential amplifier is implemented at the second stage to provide high swing. A DC servo loop with an active RC integrator is designed to block the DC offset of electrodes and a positive feedback loop is used to increase the input impedance. Finally, an area and power-efficient ripple reduction technique and chopping spike filter are used in order to have a clear signal. The designed circuit is simulated in a commercially available 0.18 μm CMOS technology. 3.7 μA current is drawn from a ±0.6V supply. The total bandwidth is from 50 mHz to 10 kHz while the total inputreferred noise in this bandwidth is 2.9 μV and the mid-band gain is about 40 dB. The designed amplifier can tolerate up to 60 mV DC electrode offset and the amplifier's input impedance with positive feedback loop is 17 MΩ while the chopping frequency is 20 kHz. With the designed ripple reduction, there is just a negligible peak in the input-referred noise due to upmodulated noise at chopping frequency. In order to prove the performance of the designed circuit, 500 Monte Carlo analysis is done for process and mismatch. The mean value for CMRR and PSRR are 94 and 80 dB, respectively.

摘要

在本文中,通过在每个阶段选择并优化合适的结构,我们设计了一种多功能低噪声斩波放大器。所提出的具有高共模抑制比(CMRR)和电源抑制比(PSRR)的神经斩波放大器适用于脑电图(EEG)、局部场电位(LFP)和动作电位(AP)信号,同时具有低噪声等效因数(NEF)。为了最小化噪声并增加带宽,第一级选择了具有伪电阻共模反馈的单级电流复用放大器,而第二级采用简单的全差分放大器以提供高摆幅。设计了一个带有有源RC积分器的直流伺服环路来阻断电极的直流偏移,并使用正反馈环路来增加输入阻抗。最后,采用了一种面积和功耗高效的纹波降低技术以及斩波尖峰滤波器,以便获得清晰的信号。所设计的电路采用商用0.18μm互补金属氧化物半导体(CMOS)技术进行了仿真。从±0.6V电源汲取3.7μA电流。总带宽为50mHz至10kHz,在此带宽内的总输入参考噪声为2.9μV,中频增益约为40dB。所设计的放大器能够容忍高达60mV的直流电极偏移,带有正反馈环路时放大器的输入阻抗为17MΩ,斩波频率为20kHz。通过所设计的纹波降低,由于斩波频率处的上调制噪声,输入参考噪声中仅有可忽略不计的峰值。为了证明所设计电路的性能,针对工艺和失配进行了500次蒙特卡罗分析。CMRR和PSRR的平均值分别为94dB和80dB。

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