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利用氧化铝的高介电常数和高带隙在基于高κ电荷俘获存储器的低功耗NOR闪存阵列中增强保留特性。

Retention Enhancement in Low Power NOR Flash Array with High-κ-Based Charge-Trapping Memory by Utilizing High Permittivity and High Bandgap of Aluminum Oxide.

作者信息

Song Young Suh, Park Byung-Gook

机构信息

Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Korea.

Department of Computer Science, Korea Military Academy, Seoul 01805, Korea.

出版信息

Micromachines (Basel). 2021 Mar 19;12(3):328. doi: 10.3390/mi12030328.

Abstract

For improving retention characteristics in the NOR flash array, aluminum oxide (AlO, alumina) is utilized and incorporated as a tunneling layer. The proposed tunneling layers consist of SiO/AlO/SiO, which take advantage of higher permittivity and higher bandgap of AlO compared to SiO and silicon nitride (SiN). By adopting the proposed tunneling layers in the NOR flash array, the threshold voltage window after 10 years from programming and erasing (P/E) was improved from 0.57 V to 4.57 V. In order to validate our proposed device structure, it is compared to another stacked-engineered structure with SiO/SiN/SiO tunneling layers through technology computer-aided design (TCAD) simulation. In addition, to verify that our proposed structure is suitable for NOR flash array, disturbance issues are also carefully investigated. As a result, it has been demonstrated that the proposed structure can be successfully applied in NOR flash memory with significant retention improvement. Consequently, the possibility of utilizing HfO as a charge-trapping layer in NOR flash application is opened.

摘要

为了改善NOR闪存阵列中的保持特性,采用了氧化铝(AlO,即矾土)并将其作为隧穿层。所提出的隧穿层由SiO/AlO/SiO组成,与SiO和氮化硅(SiN)相比,利用了AlO更高的介电常数和更大的带隙。通过在NOR闪存阵列中采用所提出的隧穿层,编程和擦除(P/E)10年后的阈值电压窗口从0.57 V提高到了4.57 V。为了验证我们所提出的器件结构,通过技术计算机辅助设计(TCAD)模拟将其与另一种具有SiO/SiN/SiO隧穿层的堆叠工程结构进行了比较。此外,为了验证我们所提出的结构适用于NOR闪存阵列,还仔细研究了干扰问题。结果表明,所提出的结构可以成功应用于NOR闪存中,显著改善保持特性。因此,开启了在NOR闪存应用中使用HfO作为电荷俘获层的可能性。

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