Packeer Mohamed Mohamed Fauzi, Mohamed Omar Mohamad Faiz, Akbar Jalaludin Khan Muhammad Firdaus, Ghazali Nor Azlin, Hairi Mohd Hendra, Falina Shaili, Samsol Baharin Mohd Syamsul Nasyriq
School of Electrical and Electronic Engineering, Universiti Sains Malaysia, Nibong Tebal 14300, Pulau Pinang, Malaysia.
Collaborative Microelectronic Design Excellence Center (CEDEC), Universiti Sains Malaysia, Sains@USM, Bayan Lepas 11900, Pulau Pinang, Malaysia.
Micromachines (Basel). 2021 Nov 30;12(12):1497. doi: 10.3390/mi12121497.
Conventional pseudomorphic high electron mobility transistor (pHEMTs) with lattice-matched InGaAs/InAlAs/InP structures exhibit high mobility and saturation velocity and are hence attractive for the fabrication of three-terminal low-noise and high-frequency devices, which operate at room temperature. The major drawbacks of conventional pHEMT devices are the very low breakdown voltage (<2 V) and the very high gate leakage current (∼1 mA/mm), which degrade device and performance especially in monolithic microwave integrated circuits low-noise amplifiers (MMIC LNAs). These drawbacks are caused by the impact ionization in the low band gap, i.e., the InxGa(1-x)As ( = 0.53 or 0.7) channel material plus the contribution of other parts of the epitaxial structure. The capability to achieve higher frequency operation is also hindered in conventional InGaAs/InAlAs/InP pHEMTs, due to the standard 1 μm flat gate length technology used. A key challenge in solving these issues is the optimization of the InGaAs/InAlAs epilayer structure through band gap engineering. A related challenge is the fabrication of submicron gate length devices using I-line optical lithography, which is more cost-effective, compared to the use of e-Beam lithography. The main goal for this research involves a radical departure from the conventional InGaAs/InAlAs/InP pHEMT structures by designing new and advanced epilayer structures, which significantly improves the performance of conventional low-noise pHEMT devices and at the same time preserves the radio frequency (RF) characteristics. The optimization of the submicron T-gate length process is performed by introducing a new technique to further scale down the bottom gate opening. The outstanding achievements of the new design approach are 90% less gate current leakage and 70% improvement in breakdown voltage, compared with the conventional design. Furthermore, the submicron T-gate length process also shows an increase of about 58% and 33% in fT and fmax, respectively, compared to the conventional 1 μm gate length process. Consequently, the remarkable performance of this new design structure, together with a submicron gate length facilitatesthe implementation of excellent low-noise applications.
具有晶格匹配的InGaAs/InAlAs/InP结构的传统赝配高电子迁移率晶体管（pHEMT）展现出高迁移率和饱和速度，因此对于制造在室温下工作的三端低噪声和高频器件具有吸引力。传统pHEMT器件的主要缺点是击穿电压非常低（<2 V）和栅极漏电流非常高（~1 mA/mm），这会降低器件性能，尤其是在单片微波集成电路低噪声放大器（MMIC LNA）中。这些缺点是由低带隙中的碰撞电离引起的，即InxGa(1-x)As（x = 0.53或0.7）沟道材料以及外延结构其他部分的贡献。由于使用标准的1μm平面栅长技术，传统的InGaAs/InAlAs/InP pHEMT实现更高频率操作的能力也受到阻碍。解决这些问题的一个关键挑战是通过带隙工程优化InGaAs/InAlAs外延层结构。一个相关的挑战是使用I线光刻制造亚微米栅长器件，与使用电子束光刻相比，这更具成本效益。本研究的主要目标是通过设计新的先进外延层结构，彻底背离传统的InGaAs/InAlAs/InP pHEMT结构，这显著提高了传统低噪声pHEMT器件的性能，同时保留了射频（RF）特性。通过引入一种新技术进一步缩小底部栅极开口，来优化亚微米T栅长工艺。与传统设计相比，新设计方法的突出成果是栅极电流泄漏减少90%，击穿电压提高70%。此外，与传统的1μm栅长工艺相比，亚微米T栅长工艺的特征频率（fT）和最高振荡频率（fmax）分别提高了约58%和33%。因此，这种新设计结构的卓越性能，加上亚微米栅长，便于实现出色的低噪声应用。
