Department of Electro-Optical Engineering, National United University, No. 2 Lienda, Miaoli 36063, Taiwan.
Sensors (Basel). 2023 May 4;23(9):4482. doi: 10.3390/s23094482.
The present study introduces an optimized overlay target design to minimize the overlay error caused by asymmetric sidewall structures in semiconductor manufacturing. To achieve this goal, the overlay error formula was derived by separating the asymmetric bottom grating structure into symmetric and asymmetric parts. Based on this formula, it was found that the overlay target design with the linewidth of the bottom grating closed to the grating period could effectively reduce the overlay error caused by the sidewall asymmetry structure. Simulation results demonstrate that the proposed design can effectively control the measurement error of different wavelengths within ±0.3 nm, even under varying sidewall angles and film thicknesses. Overall, the proposed overlay target design can significantly improve the overlay accuracy in semiconductor manufacturing processes.
本研究提出了一种优化的overlay 目标设计，以最小化半导体制造中不对称侧壁结构引起的 overlay 误差。为了实现这一目标，通过将不对称的底部光栅结构分离为对称和不对称部分，推导出了 overlay 误差公式。基于该公式，发现底部光栅线宽接近光栅周期的 overlay 目标设计可以有效地降低侧壁不对称结构引起的 overlay 误差。模拟结果表明，所提出的设计可以有效地控制不同波长的测量误差在±0.3nm 以内，即使在侧壁角度和薄膜厚度变化的情况下也是如此。总的来说，所提出的 overlay 目标设计可以显著提高半导体制造工艺中的 overlay 精度。
