Zhang Wenbo, Liang Binxi, Tang Jiachen, Chen Jian, Wan Qing, Shi Yi, Li Songlin
School of Electronic Science and Engineering, National Laboratory of Solid-State Microstructures, and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China.
School of Electronic Science and Engineering, National Laboratory of Solid-State Microstructures, and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China.
Sci Bull (Beijing). 2023 Sep 30;68(18):2025-2032. doi: 10.1016/j.scib.2023.08.014. Epub 2023 Aug 9.
All-wrapped transistors consisting of two-dimensional transition-metal dichalcogenide channels are appealing candidates for post-silicon electronics. Based on the Boltzmann transport theory, here we report a comprehensive theoretical survey on the performance limits for monolayer MoS transistors with three prototypical gate dielectrics (AlO, HfO and BN), by including primary extrinsic charge scattering mechanisms present in practical devices. A concept of "dead space" between the dielectrics and channels is proposed and used in calculation to ameliorate the general overestimation in scattering intensity of surface optical phonons, which enables an accurate description of electronic transport behavior. Crucial device indices, including charge mobility and current density, are thoroughly analyzed for transistors at post-silicon technological nodes beyond 1 nm. The on-state current is estimated to be generally greater than 2 mA μm at channel lengths below 10 nm. The results clarify the potential benefits in performance from extremely miniaturized monolayer-channel transistors for More-Moore electronics.
由二维过渡金属二硫属化物沟道组成的全包裹晶体管是后硅电子学中有吸引力的候选者。基于玻尔兹曼输运理论，我们在此报告了对具有三种典型栅极电介质（AlO、HfO和BN）的单层MoS晶体管性能极限的全面理论研究，其中包括实际器件中存在的主要非本征电荷散射机制。提出了电介质与沟道之间“死空间”的概念，并将其用于计算，以改善表面光学声子散射强度的普遍高估问题，从而能够准确描述电子输运行为。对于1nm以上的后硅技术节点的晶体管，对包括电荷迁移率和电流密度在内的关键器件指标进行了全面分析。在沟道长度低于10nm时，导通电流估计通常大于2mAμm。结果阐明了超小型化单层沟道晶体管对摩尔定律延续型电子学在性能方面的潜在益处。
