Wang Jun, Liu Jikai, Li Lei
Center for Advanced Jet Engineering Technologies (CaJET), Key Laboratory of High Efficiency and Clean Mechanical Manufacture, Ministry of Education, School of Mechanical Engineering, Shandong University, Jinan 250061, China.
Key National Demonstration Center for Experimental Mechanical Engineering Education, Shandong University, Jinan 250061, China.
Polymers (Basel). 2023 Aug 28;15(17):3573. doi: 10.3390/polym15173573.
A topology optimization approach is proposed for the design of self-supporting structures for digital light projector (DLP) 3D printing. This method accounts for the adhesion forces between the print part and the resin base during DLP printing to avoid failure of the part due to stress concentration and weak connections. Specifically, the effect of the process-related adhesion forces is first simulated by developing a design variable-interpolated finite element model to capture the intricate mechanical behavior during DLP 3D printing. Guided by the process model, a stress-constrained topology optimization algorithm is formulated with both the SIMP and RAMP interpolation schemes. The interpolations on the stress term and the design-dependent adhesion load are carefully investigated. A sensitivity result on the P-norm stress constraint is fully developed. Finally, the approach is applied to several 2D benchmark examples to validate its efficacy in controlling the process-caused peak P-norm stresses. The effects of alternating between the SIMP and RAMP interpolations and changing the stress upper limits are carefully explored during the numerical trials. Moreover, 3D printing tests are performed to validate the improvement in printability when involving the process-related P-norm stress constraint.
提出了一种拓扑优化方法，用于设计数字光投影仪（DLP）3D打印的自支撑结构。该方法考虑了DLP打印过程中打印部件与树脂基体之间的附着力，以避免部件因应力集中和连接薄弱而失效。具体而言，首先通过建立设计变量插值有限元模型来模拟与工艺相关的附着力的影响，以捕捉DLP 3D打印过程中复杂的力学行为。在工艺模型的指导下，采用SIMP和RAMP插值方案制定了应力约束拓扑优化算法。仔细研究了应力项和与设计相关的附着力载荷的插值。充分开发了P范数应力约束的灵敏度结果。最后，将该方法应用于几个二维基准示例，以验证其在控制工艺引起的峰值P范数应力方面的有效性。在数值试验中仔细探索了SIMP和RAMP插值交替以及改变应力上限的影响。此外，还进行了3D打印测试，以验证涉及与工艺相关的P范数应力约束时可打印性的提高。
