Graber Markus, Hofmann Klaus
Technical University of Darmstadt, Integrated Electronic Systems Lab, Darmstadt, Germany.
Commun Eng. 2024 Aug 23;3(1):116. doi: 10.1038/s44172-024-00261-w.
Solving combinatorial optimization problems is essential in scientific, technological, and engineering applications, but can be very time and energy-consuming using classical algorithms executed on digital processors. Oscillator-based Ising machines offer a promising alternative by exploiting the analog coupling between electrical oscillators to solve such optimization problems more efficiently. Here we present the design and the capabilities of our scalable approach to solve Ising and quadratic unconstrained binary optimization problems. This approach includes routable oscillator connections to simplify the time-consuming embedding of the problem into the oscillator network. Our manufactured silicon chip, featuring 1440 oscillators implemented in a 28 nm technology, demonstrates the ability to solve optimization problems in 950 ns while consuming typically 319 μW per node. A frequency, phase, and delay calibration ensures robustness against manufacturing variations. The system is evaluated with multiple sets of benchmark problems to analyze the sensitivity for parameters such as the coupling strength or frequency.
解决组合优化问题在科学、技术和工程应用中至关重要,但使用在数字处理器上执行的经典算法可能非常耗时且耗能。基于振荡器的伊辛机通过利用电振荡器之间的模拟耦合提供了一种有前景的替代方案,能够更高效地解决此类优化问题。在此,我们展示了用于解决伊辛和二次无约束二进制优化问题的可扩展方法的设计与能力。这种方法包括可路由的振荡器连接,以简化将问题耗时地嵌入到振荡器网络的过程。我们制造的硅芯片采用28纳米技术实现了1440个振荡器,展示了在950纳秒内解决优化问题的能力,同时每个节点通常消耗319微瓦。频率、相位和延迟校准确保了对制造差异的鲁棒性。该系统通过多组基准问题进行评估,以分析对诸如耦合强度或频率等参数的敏感性。