Regoršek Žan, Gorkič Aleš, Trost Andrej
Faculty of Electrical Engineering, University of Ljubljana, 1000 Ljubljana, Slovenia.
OptoMotive, Mechatronics Ltd., 1000 Ljubljana, Slovenia.
Sensors (Basel). 2024 Oct 15;24(20):6632. doi: 10.3390/s24206632.
Digital image compression is applied to reduce camera bandwidth and storage requirements, but real-time lossless compression on a high-speed high-resolution camera is a challenging task. The article presents hardware implementation of a Bayer colour filter array lossless image compression algorithm on an FPGA-based camera. The compression algorithm reduces colour and spatial redundancy and employs Golomb-Rice entropy coding. A rule limiting the maximum code length is introduced for the edge cases. The proposed algorithm is based on integer operators for efficient hardware implementation. The algorithm is first verified as a C++ model and later implemented on AMD-Xilinx Zynq UltraScale+ device using VHDL. An effective tree-like pipeline structure is proposed to concatenate codes of compressed pixel data to generate a bitstream representing data of 16 parallel pixels. The proposed parallel compression achieves up to 56% reduction in image size for high-resolution images. Pipelined implementation without any state machine ensures operating frequencies up to 320 MHz. Parallelised operation on 16 pixels effectively increases data throughput to 40 Gbit/s while keeping the total memory requirements low due to real-time processing.
数字图像压缩用于减少相机带宽和存储需求，但对高速高分辨率相机进行实时无损压缩是一项具有挑战性的任务。本文介绍了一种基于FPGA的相机上拜耳彩色滤光片阵列无损图像压缩算法的硬件实现。该压缩算法减少了颜色和空间冗余，并采用了哥伦布-莱斯熵编码。针对边缘情况引入了一个限制最大码长的规则。所提出的算法基于整数运算符，以实现高效的硬件实现。该算法首先作为一个C++模型进行验证，随后使用VHDL在AMD-Xilinx Zynq UltraScale+器件上实现。提出了一种有效的树状流水线结构，用于连接压缩像素数据的代码，以生成表示16个并行像素数据的比特流。对于高分辨率图像，所提出的并行压缩可使图像大小减少高达56%。无任何状态机的流水线实现确保了高达320 MHz的工作频率。对16个像素进行并行操作有效地将数据吞吐量提高到40 Gbit/s，同时由于实时处理而使总内存需求保持较低水平。
