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作为InAs/Al界面潜在隧道势垒的ZnTe和CdSe的第一性原理评估

First-Principles Assessment of ZnTe and CdSe as Prospective Tunnel Barriers at the InAs/Al Interface.

作者信息

Jardine Malcolm J A, Dardzinski Derek, Cai Zefeng, Strocov Vladimir N, Hocevar Moïra, Palmstrøm Christopher J, Frolov Sergey M, Marom Noa

机构信息

Department of Materials Science and Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania 15213, United States.

Swiss Light Source, Paul Scherrer Institut, CH-5232 Villigen PSI, Switzerland.

出版信息

ACS Appl Mater Interfaces. 2025 Jan 22;17(3):5462-5474. doi: 10.1021/acsami.4c17957. Epub 2025 Jan 12.

Abstract

Majorana zero modes are predicted to emerge in semiconductor/superconductor interfaces, such as InAs/Al. Majorana modes could be utilized for fault tolerant topological qubits. However, their realization is hindered by materials challenges. The coupling between the superconductor and the semiconductor may be too strong for Majorana modes to emerge, due to effective doping of the semiconductor by the metallic contact. This could be mediated by adding a tunnel barrier of controlled thickness. We use density functional theory (DFT) with Hubbard U corrections, whose values are machine-learned via Bayesian optimization (BO), to assess ZnTe and CdSe as prospective tunnel barriers for the InAs/Al interface. The results of DFT+U(BO) for ZnTe are validated by comparison to angle resolved photoemission spectroscopy (ARPES). We then study bilayer interfaces of the three semiconductors with each other and with Al, as well as trilayer interfaces with a varying number of ZnTe or CdSe layers inserted between InAs and Al. We find that 16 atomic layers of either material completely insulate the InAs from metal induced gap states (MIGS). However, ZnTe and CdSe differ significantly in their band alignment, such that ZnTe forms an effective barrier for electrons, whereas CdSe forms a barrier for holes. Because of Fermi level pinning in the conduction band at the interface, only electron transport is relevant for InAs-based Majorana devices. Therefore, ZnTe is the better choice. Based on the results of our simulations, we suggest conducting experiments with ZnTe barriers in the thickness range of 6-18 atomic layers.

摘要

预计在半导体/超导体界面(如InAs/Al)中会出现马约拉纳零模。马约拉纳模可用于容错拓扑量子比特。然而,材料方面的挑战阻碍了它们的实现。由于金属接触对半导体的有效掺杂,超导体与半导体之间的耦合可能过强,以至于马约拉纳模无法出现。这可以通过添加具有可控厚度的隧道势垒来调节。我们使用带有哈伯德U修正的密度泛函理论(DFT),其值通过贝叶斯优化(BO)进行机器学习,以评估ZnTe和CdSe作为InAs/Al界面潜在隧道势垒的情况。通过与角分辨光电子能谱(ARPES)比较,验证了DFT+U(BO)对ZnTe的计算结果。然后,我们研究了这三种半导体彼此之间以及与Al的双层界面,以及在InAs和Al之间插入不同数量ZnTe或CdSe层的三层界面。我们发现,这两种材料中的任何一种的16个原子层都能使InAs完全免受金属诱导能隙态(MIGS)的影响。然而,ZnTe和CdSe在能带排列上有显著差异,以至于ZnTe对电子形成有效的势垒,而CdSe对空穴形成势垒。由于界面处导带中的费米能级钉扎,对于基于InAs的马约拉纳器件,只有电子传输是相关的。因此,ZnTe是更好的选择。基于我们的模拟结果,我们建议对厚度在6 - 18个原子层范围内的ZnTe势垒进行实验。

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