Zhang Xinwei, Zhou Jiachao, Zhang Yishu, Chai Jian, Bai Yongqing, Wang Hailiang, He Qian, Wang Xi, Wang Lin, Zhao Yuda, Xu Yang, Yu Bin
College of Integrated Circuits, Zhejiang University, Hangzhou, Zhejiang, 311200, China.
ZJU-Hangzhou Global Scientific and Technological Innovation Center, Hangzhou, Zhejiang, 311200, China.
Adv Sci (Weinh). 2025 Jul;12(26):e2502286. doi: 10.1002/advs.202502286. Epub 2025 Apr 15.
Security is a critical challenge in the integrated circuit (IC) industry, yet device-level hardware security remains largely underexplored. Most existing solutions necessitate modifications to current technology nodes and typically address only a single security threat, leaving them vulnerable to diverse attacks while incurring substantial costs in area, energy, and resources. In this study, an out-of-the-box security solution is proposed that integrates an in-memory sensing and computing (IMSC) architecture based on α-InSe transistor, specifically designed for versatile and multimodal secure applications. By leveraging the unique ferroelectric, optoelectronic, and semiconducting properties of α-InSe, the study demonstrates the secure transistor's electronic and optoelectronic synaptic behaviors, along with its capability for reconfigurable logic operations. Based on these, the secure transistor successfully implements four key security primitives: anticounterfeiting, watermarking, logic locking, and IC camouflaging in a single-transistor structure, offering robust protection against counterfeit ICs, intellectual property theft, and reverse engineering. The multimodal secure transistor demonstrates the functional flexibility in addressing various security threats.
安全是集成电路(IC)行业面临的一项关键挑战,但器件级硬件安全在很大程度上仍未得到充分探索。大多数现有解决方案需要对当前技术节点进行修改,并且通常只能应对单一的安全威胁,这使得它们容易受到各种攻击,同时在面积、能源和资源方面会产生高昂成本。在本研究中,提出了一种全新的安全解决方案,该方案集成了基于α-InSe晶体管的内存感知与计算(IMSC)架构,专为通用和多模态安全应用而设计。通过利用α-InSe独特的铁电、光电和半导体特性,该研究展示了安全晶体管的电子和光电突触行为,以及其进行可重构逻辑运算的能力。基于这些,安全晶体管在单晶体管结构中成功实现了四个关键安全原语:防伪、水印、逻辑锁定和IC伪装,为防止假冒IC、知识产权盗窃和逆向工程提供了强大保护。多模态安全晶体管展示了应对各种安全威胁时的功能灵活性。