Ren Guoteng, Yuan Saifei, Peng Jingjing, Liu Ruitao, Feng Yuhao, Liu Haonan, Lu Wenshuai, Xing Fei, Sun Ting, Yu Shijie
College of Instrument Science and Opto-Electronics Engineering, Beijing Information Science and Technology University, Beijing 100192, China.
Laboratory of Intelligent Microsystems, Beijing Information Science and Technology University, Beijing 100192, China.
Sensors (Basel). 2025 Apr 14;25(8):2461. doi: 10.3390/s25082461.
In order to meet the application requirements for high-precision and low-noise accelerometers in micro-vibration measurement and navigation fields, this paper presents the design and testing of an ultra-high-capacitance resolution capacitive readout circuit with attofarad-level precision. First, a differential charge amplifier circuit is employed for the first stage of capacitance detection. To suppress noise interference in the circuit, a frequency-domain modulation technique is utilized to mitigate low-frequency noise. Subsequently, a differential subtraction circuit is implemented to reduce common-mode noise. Additionally, an improved filtering circuit is designed to suppress noise interference in the final stage. The test results indicate that the designed circuit operates at a carrier frequency of 1 MHz, achieving a capacitance resolution of up to 0.103 aF/Hz1/2 and a noise floor of 25.6 μg/Hz1/2, thereby meeting the requirements for high-precision and low-noise capacitance detection in MEMS accelerometers.
为满足微振动测量和导航领域对高精度、低噪声加速度计的应用需求,本文提出了一种具有阿法拉级精度的超高电容分辨率电容读出电路的设计与测试。首先,采用差分电荷放大器电路进行电容检测的第一级。为抑制电路中的噪声干扰,利用频域调制技术减轻低频噪声。随后,实现差分减法电路以降低共模噪声。此外,设计了一种改进的滤波电路以抑制最后一级的噪声干扰。测试结果表明,所设计的电路在1 MHz载波频率下工作,实现了高达0.103 aF/Hz1/2的电容分辨率和25.6 μg/Hz1/2的本底噪声,从而满足了MEMS加速度计中高精度、低噪声电容检测的要求。