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高分辨率微机电系统(MEMS)加速度计接口专用集成电路研究。

Research on High-Resolution Miniaturized MEMS Accelerometer Interface ASIC.

机构信息

Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo 315211, China.

Southern Marine Science and Engineering Guangdong Laboratory, Guangdong Key Laboratory of Ocean Remote Sensing (LORS), South China Sea Institute of Oceanology, Chinese Academy of Sciences, Guangzhou 510301, China.

出版信息

Sensors (Basel). 2020 Dec 18;20(24):7280. doi: 10.3390/s20247280.

Abstract

High-precision microelectromechanical system (MEMS) accelerometers have wide application in the military and civil fields. The closed-loop microaccelerometer interface circuit with switched capacitor topology has a high signal-to-noise ratio, wide bandwidth, good linearity, and easy implementation in complementary metal oxide semiconductor (CMOS) process. Aiming at the urgent need for high-precision MEMS accelerometers in geophones, we carried out relevant research on high-performance closed-loop application specific integrated circuit (ASIC) chips. According to the characteristics of the performance parameters and output signal of MEMS accelerometers used in geophones, a high-precision closed-loop interface ASIC chip based on electrostatic time-multiplexing feedback technology and proportion integration differentiation (PID) feedback control technology was designed and implemented. The interface circuit consisted of a low-noise charge-sensitive amplifier (CSA), a sampling and holding circuit, and a PID feedback circuit. We analyzed and optimized the noise characteristics of the interface circuit and used a capacitance compensation array method to eliminate misalignment of the sensitive element. The correlated double sampling (CDS) technology was used to eliminate low-frequency noise and offset of the interface circuit. The layout design and engineering batch chip were fabricated by a standard 0.35 μm CMOS process. The active area of the chip was 3.2 mm × 3 mm. We tested the performance of the accelerometer system with the following conditions: power dissipation of 7.7 mW with a 5 V power supply and noise density less than 0.5 μg/Hz. The accelerometers had a sensitivity of 1.2 V/g and an input range of ±1.2 g. The nonlinearity was 0.15%, and the bias instability was about 50 μg.

摘要

高精度微机电系统 (MEMS) 加速度计在军事和民用领域有广泛的应用。采用开关电容拓扑的闭环微加速度计接口电路具有高信噪比、宽带宽、良好的线性度,并且易于在互补金属氧化物半导体 (CMOS) 工艺中实现。针对地震检波器对高精度 MEMS 加速度计的迫切需求,我们对高性能闭环专用集成电路 (ASIC) 芯片进行了相关研究。根据地震检波器中使用的 MEMS 加速度计的性能参数和输出信号的特点,设计并实现了一种基于静电时复用反馈技术和比例积分微分 (PID) 反馈控制技术的高精度闭环接口 ASIC 芯片。接口电路由低噪声电荷灵敏放大器 (CSA)、采样保持电路和 PID 反馈电路组成。我们分析和优化了接口电路的噪声特性,并采用电容补偿阵列方法消除敏感元件的失配。相关双采样 (CDS) 技术用于消除接口电路的低频噪声和失调。布局设计和工程批芯片由标准的 0.35μm CMOS 工艺制造。芯片的有效面积为 3.2mm×3mm。我们在以下条件下测试了加速度计系统的性能:电源功耗为 7.7mW,电源为 5V,噪声密度小于 0.5μg/Hz。加速度计的灵敏度为 1.2V/g,输入范围为±1.2g。非线性度为 0.15%,偏置不稳定性约为 50μg。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/9a16/7765797/18bdbcf33d9c/sensors-20-07280-g001.jpg

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