用于概率网络和尖峰时间计算的模拟式超大规模集成电路。

Analogue VLSI for probabilistic networks and spike-time computation.

作者信息

Murray A

机构信息

Dept. of Electronics and Electrical Engineering, University of Edinburgh, UK.

出版信息

Int J Neural Syst. 2001 Feb;11(1):23-32. doi: 10.1142/S0129065701000473.

DOI:10.1142/S0129065701000473

PMID:11310552

Abstract

The history and some of the methods of analogue neural VLSI are described. The strengths of analogue techniques are described, along with residual problems to be solved. The nature of hardware-friendly and hardware-appropriate algorithms is reviewed and suggestions are offered as to where analogue neural VLSI's future lies.

摘要

本文描述了模拟神经超大规模集成电路的发展历程及一些方法。阐述了模拟技术的优势以及有待解决的遗留问题。回顾了硬件友好型和硬件适配型算法的本质，并对模拟神经超大规模集成电路的未来发展方向提出了建议。