Draghici S
Department of Computer Science, Wayne State University, Detroit, MI 48202, USA.
Int J Neural Syst. 2000 Feb;10(1):19-42. doi: 10.1142/S0129065700000041.
This paper presents a brief review of some analog hardware implementations of neural networks. Several criteria for the classification of general neural networks implementations are discussed and a taxonomy induced by these criteria is presented. The paper also discusses some characteristics of analog implementations as well as some trade-offs and issues identified in the work reviewed. Parameters such as precision, chip area, power consumption, speed and noise susceptibility are discussed in the context of neural implementations. A unified review of various "VLSI friendly" algorithms is also presented. The paper concludes with some conclusions drawn from the analysis of the implementations presented.
本文简要回顾了神经网络的一些模拟硬件实现。讨论了通用神经网络实现分类的几个标准，并给出了由这些标准引出的分类法。本文还讨论了模拟实现的一些特性，以及在所回顾的工作中确定的一些权衡和问题。在神经网络实现的背景下，讨论了精度、芯片面积、功耗、速度和噪声敏感性等参数。还对各种“超大规模集成电路友好型”算法进行了统一综述。本文最后从对所展示的实现的分析中得出了一些结论。
