Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, People's Republic of China.
Nanotechnology. 2010 Feb 19;21(7):75303. doi: 10.1088/0957-4484/21/7/075303. Epub 2010 Jan 21.
A new method has been developed to selectively fabricate nano-gap electrodes and nano-channels by conventional lithography. Based on a sacrificial spacer process, we have successfully obtained sub-100-nm nano-gap electrodes and nano-channels and further reduced the dimensions to 20 nm by shrinking the sacrificial spacer size. Our method shows good selectivity between nano-gap electrodes and nano-channels due to different sacrificial spacer etch conditions. There is no length limit for the nano-gap electrode and the nano-channel. The method reported in this paper also allows for wafer scale fabrication, high throughput, low cost, and good compatibility with modern semiconductor technology.
一种新的方法已经被开发出来，通过传统的光刻技术选择性地制造纳米间隙电极和纳米通道。基于牺牲层间隔工艺，我们已经成功获得了小于 100nm 的纳米间隙电极和纳米通道，并通过缩小牺牲层间隔的尺寸将尺寸进一步减小至 20nm。由于不同的牺牲层间隔刻蚀条件，我们的方法在纳米间隙电极和纳米通道之间表现出良好的选择性。纳米间隙电极和纳米通道没有长度限制。本文报道的方法还允许晶圆级制造、高吞吐量、低成本，并且与现代半导体技术具有良好的兼容性。
