退火对采用热丝化学气相沉积法制备的非晶硅/氮化硅多层膜电容-电压特性的影响

Annealing effects on capacitance-voltage characteristics of a-Si/SiN(x) multilayer prepared using hot-wire chemical vapour deposition.

作者信息

Panchal A K, Rai D K, Solanki C S

机构信息

Electrical Engineering Department, S V National Institute of Technology, Surat 395007, Gujarat, India.

出版信息

J Nanosci Nanotechnol. 2011 Apr;11(4):3414-7. doi: 10.1166/jnn.2011.3618.

DOI:10.1166/jnn.2011.3618

PMID:21776718

Abstract

Post-deposition annealing of a-Si/SiN(x) multilayer films at different temperature shows varying shift in high frequency (1 MHz) capacitance-voltage (HFCV) characteristics. Various a-Si/SiN(x) multilayer films were deposited using hot wire chemical vapor deposition (HWCVD) and annealed in the temperature range of 800 to 900 degrees C to precipitate Si quantum dots (Si-QD) in a-Si layers. HFCV measurements of the as-deposited and annealed films in metal-insulator-semiconductor (MIS) structures show hysterisis in C-V curves. The hysteresis in the as-deposited films and annealed films is attributed to charge trapping in Si-dangling bonds in a-Si layer and in Si-QD respectively. The charge trapping density in Si-QD increases with temperature while the interface defects density (D(it)) remains constant.

摘要

非晶硅/氮化硅（SiN(x)）多层膜在不同温度下进行沉积后退火，其高频（1兆赫兹）电容 - 电压（HFCV）特性会出现不同程度的偏移。采用热丝化学气相沉积（HWCVD）法制备了各种非晶硅/氮化硅（SiN(x)）多层膜，并在800至900摄氏度的温度范围内进行退火，以使非晶硅层中析出硅量子点（Si - QD）。对金属 - 绝缘体 - 半导体（MIS）结构中沉积态和退火态薄膜的HFCV测量显示，其C - V曲线存在滞后现象。沉积态薄膜和退火态薄膜中的滞后现象分别归因于非晶硅层中硅悬键和硅量子点中的电荷俘获。硅量子点中的电荷俘获密度随温度升高而增加，而界面缺陷密度（D(it)）保持不变。