Craciun Stefan, Brockmeier Austin J, George Alan D, Lam Herman, Príncipe José C
Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32611, USA.
Annu Int Conf IEEE Eng Med Biol Soc. 2011;2011:4621-4. doi: 10.1109/IEMBS.2011.6091144.
Methods for decoding movements from neural spike counts using adaptive filters often rely on minimizing the mean-squared error. However, for non-Gaussian distribution of errors, this approach is not optimal for performance. Therefore, rather than using probabilistic modeling, we propose an alternate non-parametric approach. In order to extract more structure from the input signal (neuronal spike counts) we propose using minimum error entropy (MEE), an information-theoretic approach that minimizes the error entropy as part of an iterative cost function. However, the disadvantage of using MEE as the cost function for adaptive filters is the increase in computational complexity. In this paper we present a comparison between the decoding performance of the analytic Wiener filter and a linear filter trained with MEE, which is then mapped to a parallel architecture in reconfigurable hardware tailored to the computational needs of the MEE filter. We observe considerable speedup from the hardware design. The adaptation of filter weights for the multiple-input, multiple-output linear filters, necessary in motor decoding, is a highly parallelizable algorithm. It can be decomposed into many independent computational blocks with a parallel architecture readily mapped to a field-programmable gate array (FPGA) and scales to large numbers of neurons. By pipelining and parallelizing independent computations in the algorithm, the proposed parallel architecture has sublinear increases in execution time with respect to both window size and filter order.
使用自适应滤波器从神经脉冲计数中解码运动的方法通常依赖于最小化均方误差。然而，对于误差的非高斯分布，这种方法在性能方面并非最优。因此，我们提出了一种替代的非参数方法，而不是使用概率建模。为了从输入信号（神经脉冲计数）中提取更多结构，我们建议使用最小误差熵（MEE），这是一种信息论方法，它将误差熵最小化作为迭代成本函数的一部分。然而，将MEE用作自适应滤波器的成本函数的缺点是计算复杂度增加。在本文中，我们比较了解析维纳滤波器和用MEE训练的线性滤波器的解码性能，然后将其映射到针对MEE滤波器的计算需求定制的可重构硬件中的并行架构。我们观察到硬件设计带来了显著的加速。在运动解码中，多输入多输出线性滤波器的滤波器权重调整是一种高度可并行化的算法。它可以分解为许多独立的计算块，其并行架构可以很容易地映射到现场可编程门阵列（FPGA），并且可以扩展到大量神经元。通过在算法中对独立计算进行流水线化和并行化，所提出的并行架构在执行时间方面相对于窗口大小和滤波器阶数都有亚线性增长。
