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基于容错位交错PN结的25 Gbit/s硅微环调制器。

25 Gbit/s silicon microring modulator based on misalignment-tolerant interleaved PN junctions.

作者信息

Xiao Xi, Xu Hao, Li Xianyao, Hu Yingtao, Xiong Kang, Li Zhiyong, Chu Tao, Yu Yude, Yu Jinzhong

机构信息

Optoelectronic System Laboratory, Institute of Semiconductors, Chinese Academy of Sciences, P.O. Box 912, Beijing 100083, China.

出版信息

Opt Express. 2012 Jan 30;20(3):2507-15. doi: 10.1364/OE.20.002507.

Abstract

A high-speed depletion-mode silicon-based microring modulator with interleaved PN junctions optimized for high modulation efficiency and large alignment tolerance is demonstrated. It is fabricated using standard 0.18 μm complementary metal-oxide-semiconductor processes and provides low V(π)L(π)s of 0.68 V·cm to 1.64 V·cm with a moderate doping concentration of 2 × 10(17) cm(-3). The measured modulation efficiency decreases by only 12.4% under ± 150 nm alignment errors. 25 Gbit/s non-return-zero modulation with a 4.5 dB extinction ratio is experimentally realized at a peak-to-peak driving voltage of 2 V, demonstrating the excellent performance of the novel doping profile.

摘要

展示了一种具有交错PN结的高速耗尽型硅基微环调制器,该调制器针对高调制效率和大对准容差进行了优化。它采用标准的0.18μm互补金属氧化物半导体工艺制造,在2×10(17) cm(-3)的中等掺杂浓度下,提供0.68 V·cm至1.64 V·cm的低V(π)L(π)值。在±150 nm对准误差下,测量的调制效率仅下降12.4%。在2 V的峰峰值驱动电压下,通过实验实现了具有4.5 dB消光比的25 Gbit/s非归零调制,证明了新型掺杂分布的优异性能。

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