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用于超声应用的高压功率放大器的查找表数字预失真技术。

A look-up-table digital predistortion technique for high-voltage power amplifiers in ultrasonic applications.

机构信息

Electrical Engineering Department, Southern Methodist University, Dallas, TX, USA.

出版信息

IEEE Trans Ultrason Ferroelectr Freq Control. 2012 Jul;59(7):1550-7. doi: 10.1109/TUFFC.2012.2354.

DOI:10.1109/TUFFC.2012.2354
PMID:22828849
Abstract

In this paper, we present a digital predistortion technique to improve the linearity and power efficiency of a high-voltage class-AB power amplifier (PA) for ultrasound transmitters. The system is composed of a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), and a field-programmable gate array (FPGA) in which the digital predistortion (DPD) algorithm is implemented. The DPD algorithm updates the error, which is the difference between the ideal signal and the attenuated distorted output signal, in the look-up table (LUT) memory during each cycle of a sinusoidal signal using the least-mean-square (LMS) algorithm. On the next signal cycle, the error data are used to equalize the signal with negative harmonic components to cancel the amplifier's nonlinear response. The algorithm also includes a linear interpolation method applied to the windowed sinusoidal signals for the B-mode and Doppler modes. The measurement test bench uses an arbitrary function generator as the DAC to generate the input signal, an oscilloscope as the ADC to capture the output waveform, and software to implement the DPD algorithm. The measurement results show that the proposed system is able to reduce the second-order harmonic distortion (HD2) by 20 dB and the third-order harmonic distortion (HD3) by 14.5 dB, while at the same time improving the power efficiency by 18%.

摘要

在本文中,我们提出了一种数字预失真技术,用于提高超声发射器中高压 AB 类功率放大器 (PA) 的线性度和功率效率。该系统由数模转换器 (DAC)、模数转换器 (ADC) 和现场可编程门阵列 (FPGA) 组成,其中实现了数字预失真 (DPD) 算法。DPD 算法在每个正弦信号周期中使用最小均方 (LMS) 算法更新误差,该误差是理想信号和衰减失真输出信号之间的差异,存储在查找表 (LUT) 中。在下一个信号周期,使用误差数据来均衡具有负谐波分量的信号,以抵消放大器的非线性响应。该算法还包括应用于 B 模式和多普勒模式的窗口正弦信号的线性插值方法。测量测试台使用任意函数发生器作为 DAC 生成输入信号,使用示波器作为 ADC 捕获输出波形,并使用软件实现 DPD 算法。测量结果表明,所提出的系统能够将二阶谐波失真 (HD2) 降低 20 dB,将三阶谐波失真 (HD3) 降低 14.5 dB,同时提高功率效率 18%。

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