Liu Xinjun, Biju Kuyyadi P, Park Jubong, Park Sangsu, Shin Jungho, Kim Insung, Md Sadaf Sharif, Hwang Hyunsang
School of Materials Science and Engineering, Gwangju Institute of Science and Technology (GIST) Gwangju 500-712, Korea.
J Nanosci Nanotechnol. 2012 Apr;12(4):3252-5. doi: 10.1166/jnn.2012.5606.
Yttria-stabilized zirconia (YSZ) layers of various thicknesses were designed and introduced before Pr0.7Ca0.3MnO3 (PCMO) film was deposited on W bottom electrodes with a submicron via-hole structure. By changing the thickness of the YSZ barrier layer (3, 5, 9, and 13 nm), a tunable memory window can be realized while low power consumption (P(max) < 4 microW) is maintained. Resistive switching (RS) in a Pt/PCMO/YSZ/W stack with a thin YSZ layer can be ascribed to an oxidation/reduction reaction caused by a ring-type PCMO/W contact, while RS with a thick YSZ layer may be related to oxygen migration across the YSZ layer between the PCMO film and the W bottom electrode and the increase (decrease) of the effective tunnel barrier height of the YSZ layer. Excellent RS behavior characteristics, such as a large R(HRS)/R(LRS) ratio (> 10(3)), die-to-die uniformity, sweeping endurance, and a retention time of more than 10(3) s, can be obtained by optimizing the thickness of YSZ layer.
在具有亚微米通孔结构的钨底部电极上沉积Pr0.7Ca0.3MnO3（PCMO）薄膜之前，设计并引入了不同厚度的氧化钇稳定氧化锆（YSZ）层。通过改变YSZ势垒层的厚度（3、5、9和13纳米），可以实现可调的存储窗口，同时保持低功耗（P(max) < 4微瓦）。具有薄YSZ层的Pt/PCMO/YSZ/W堆栈中的电阻开关（RS）可归因于环形PCMO/W接触引起的氧化/还原反应，而具有厚YSZ层的RS可能与PCMO薄膜和钨底部电极之间穿过YSZ层的氧迁移以及YSZ层有效隧道势垒高度的增加（减少）有关。通过优化YSZ层的厚度，可以获得优异的RS行为特性，如大的R(HRS)/R(LRS)比（> 10(3)）、芯片间均匀性、扫描耐久性和超过10(3)秒的保持时间。
