Wang Chao-Lung, Lee I-Che, Wu Chun-Yu, Liao Chan-Yu, Cheng Yu-Ting, Cheng Huang-Chung
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, 300, Taiwan.
J Nanosci Nanotechnol. 2012 Jul;12(7):5505-9. doi: 10.1166/jnn.2012.6308.
High-performance low-temperature polycrystalline silicon (Poly-Si) thin-film transistors (TFTs) have been fabricated with two-dimensional (2-D) location-controlled grain boundaries using excimer laser crystallization (ELC). By locally increased thickness of the amorphous silicon (a-Si) film that was served as the seed crystals with a partial-melting crystallization scheme, the cross-shaped grain boundary structures were produced between the thicker a-Si grids. The Poly-Si TFTs with one parallel and one perpendicular grain boundary along the channel direction could therefore be fabricated to reach excellent field-effect mobility of 530 cm2/V-s while the conventional ones exhibited field-effect mobility of 198 cm2/V-s. Furthermore, the proposed TFTs achieved not only superior electric properties but also improved uniformity as compared with the conventional ones owing to the artificially controlled locations of grain boundaries.
利用准分子激光结晶（ELC）技术，通过二维位置控制的晶界制备了高性能低温多晶硅（Poly-Si）薄膜晶体管（TFT）。采用部分熔化结晶方案，通过局部增加用作籽晶的非晶硅（a-Si）膜的厚度，在较厚的a-Si网格之间产生十字形晶界结构。因此，可以制造出沿沟道方向具有一条平行和一条垂直晶界的Poly-Si TFT，其场效应迁移率达到530 cm2/V-s的优异值，而传统的TFT场效应迁移率为198 cm2/V-s。此外，与传统TFT相比，由于晶界位置的人工控制，所提出的TFT不仅具有优异的电学性能，而且均匀性也得到了改善。
