Wen Meiying, Cheng Yayu, Li Ye
Annu Int Conf IEEE Eng Med Biol Soc. 2013;2013:3234-7. doi: 10.1109/EMBC.2013.6610230.
An analog front-end (AFE) used in portable electrocardiogram (ECG) monitoring devices is proposed. This AFE has included all necessary functions for the commercial applications. The core circuit consists of the instrumentation amplifier (IA), a 2(nd) order Butterworth low pass filter, and the second amplifying stage. The driven-right-leg circuit is integrated in the IA to effectively suppress the common mode interference. And the power management circuits provide a stable supply voltage, bias current and reference voltage for the other circuits. To guarantee the validity of the continuous monitoring data, the leadoff monitoring circuit is developed to monitor the connection of the leads. The chip is taped out with SMIC 0.18 µm CMOS process, and the measured results show that the common mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) achieve 75 dB and 90dB respectively, and the equivalent input referred noise is 12 µV.
本文提出了一种用于便携式心电图（ECG）监测设备的模拟前端（AFE）。该AFE具备了商业应用所需的所有功能。核心电路由仪表放大器（IA）、二阶巴特沃斯低通滤波器和第二级放大电路组成。驱动右腿电路集成在IA中，以有效抑制共模干扰。电源管理电路为其他电路提供稳定的电源电压、偏置电流和参考电压。为确保连续监测数据的有效性，开发了导联脱落监测电路来监测导联的连接情况。该芯片采用中芯国际0.18μm CMOS工艺流片，测试结果表明，共模抑制比（CMRR）和电源抑制比（PSRR）分别达到75dB和90dB，等效输入参考噪声为12μV。
