Laboratory for Physical Sciences, University of Maryland, College Park, MD 20742, USA. Department of Physics, University of Maryland, College Park, MD 20742, USA.
Nanotechnology. 2014 Jan 31;25(4):045705. doi: 10.1088/0957-4484/25/4/045705. Epub 2014 Jan 6.
We present a measurement protocol that effectively eliminates both the hysteresis and the temporal drift typically observed in the channel conductance of single-walled carbon nanotube field-effect transistors (SWNT FETs) during the application of gate voltages. Before each resistance measurement, the gate is first stepped through a series of alternating positive and negative voltages to produce a neutral charge distribution within the device. This process is highly effective at removing the hysteresis in the channel conductance, and time-dependent measurements further demonstrate that the drain current is stable and single-valued, independent of the prior measurement history. The effectiveness of this method can be understood within the Preisach hysteresis model, which we demonstrate as a useful framework to predict the observed results.
我们提出了一种测量协议，该协议有效地消除了在施加栅极电压时单壁碳纳米管场效应晶体管（SWNT FET）的沟道电导中通常观察到的滞后和时漂。在每次电阻测量之前，栅极首先通过一系列交替的正电压和负电压来产生器件内的中性电荷分布。该过程非常有效地消除了沟道电导中的滞后，并且时变测量进一步表明，漏极电流是稳定的，且单值的，与先前的测量历史无关。该方法的有效性可以在 Preisach 滞后模型中得到理解，我们将其证明为预测观察结果的有用框架。
