Department of Materials Science and Engineering, ‡Department of Electrical and Electronic Engineering, Yonsei University , Seoul, Korea.
ACS Appl Mater Interfaces. 2015 Jan 14;7(1):929-34. doi: 10.1021/am507478q. Epub 2015 Jan 2.
The dependence of electrical properties of rough and cylindrical Si nanowires (NWs) synthesized by diameter-controllable metal catalyst-assisted etching (MCE) on the size of the NW's diameter was demonstrated. Using a decal-printing and transfer process assisted by Al2O3 sacrificial layer, the Si NW field effect transistor (FET) embedded in a polyvinylphenol adhesive and dielectric layer were fabricated. As the diameter of Si NW increased, the mobility of FET increased from 80.51 to 170.95 cm(2)/V·s and the threshold voltage moved from -7.17 to 0 V because phonon-electron wave function overlaps, surface scattering, and defect scattering decreased and gate coupling increased as the ratio of surface-to-volume got reduced.
通过直径可控的金属催化剂辅助刻蚀(MCE)合成的粗糙和圆柱状 Si 纳米线(NWs)的电学性能取决于 NW 直径的大小,这一点得到了证明。使用氧化铝牺牲层辅助的压印和转移工艺,在聚醋酸乙烯酯粘结剂和介电层中制造了 SiNW 场效应晶体管(FET)。随着 SiNW 直径的增加,FET 的迁移率从 80.51 增加到 170.95 cm2/V·s,而阈值电压从-7.17 变为 0V,因为声子-电子波函数重叠、表面散射和缺陷散射减少,而栅极耦合随着表面积与体积比的减小而增加。