Luo Xiao, Li Yao, Lv Wenli, Zhao Feiyu, Sun Lei, Peng Yingquan, Wen Zhanwei, Zhong Junkang, Zhang Jianping
Institute of Microelectronics, School of Physical Science and Technology, Lanzhou University, South Tianshui Road 222#, Lanzhou 730000, People's Republic of China.
Nanotechnology. 2015 Jan 21;26(3):035201. doi: 10.1088/0957-4484/26/3/035201. Epub 2014 Dec 30.
A facile fabrication and characteristics of copper phthalocyanine (CuPc)-based organic field-effect transistor (OFET) using the gold nanoparticles (Au NPs) modification is reported, thereby achieving highly improved performance. The effect of Au NPs located at three different positions, that is, at the SiO2/CuPc interface (device B), embedding in the middle of CuPc layer (device C), and on the top of CuPc layer (device D), is investigated, and the results show that device D has the best performance. Compared with the device without Au NPs (reference device A), device D displays an improvement of field-effect mobility (μ(sat)) from 1.65 × 10(-3) to 5.51 × 10(-3) cm(2) V(-1) s(-1), and threshold voltage decreases from -23.24 to -16.12 V. Therefore, a strategy for the performance improvement of the CuPc-based OFET with large field-effect mobility and saturation drain current is developed, on the basis of the concept of nanoscale Au modification. The model of an additional electron transport channel formation by FET operation at the Au NPs/CuPc interface is therefore proposed to explain the observed performance improvement. Optimum CuPc thickness is confirmed to be about 50 nm in the present study. The device-to-device uniformity and time stability are discussed for future application.
报道了一种基于铜酞菁(CuPc)的有机场效应晶体管(OFET)的简便制备方法及其特性,该方法使用金纳米颗粒(Au NPs)进行修饰,从而实现了性能的显著提升。研究了Au NPs位于三个不同位置的效果,即位于SiO2/CuPc界面(器件B)、嵌入CuPc层中间(器件C)以及位于CuPc层顶部(器件D),结果表明器件D性能最佳。与没有Au NPs的器件(参考器件A)相比,器件D的场效应迁移率(μ(sat))从1.65×10(-3)提高到5.51×10(-3) cm(2) V(-1) s(-1),阈值电压从-23.24 V降至-16.12 V。因此,基于纳米级Au修饰的概念,开发了一种提高具有大场效应迁移率和饱和漏极电流的基于CuPc的OFET性能的策略。因此,提出了在Au NPs/CuPc界面通过场效应晶体管操作形成额外电子传输通道的模型来解释观察到的性能提升。在本研究中,确认最佳CuPc厚度约为50 nm。讨论了器件间的均匀性和时间稳定性以供未来应用。