IBM T.J. Watson Research Center , Yorktown Heights, New York 10598, United States.
ACS Nano. 2015 Feb 24;9(2):1936-44. doi: 10.1021/nn506839p. Epub 2015 Feb 9.
Ultrascaled transistors based on single-walled carbon nanotubes are identified as one of the top candidates for future microprocessor chips as they provide significantly better device performance and scaling properties than conventional silicon technologies. From the perspective of the chip performance, the device variability is as important as the device performance for practical applications. This paper presents a systematic investigation on the origins and characteristics of the threshold voltage (VT) variability of scaled quasiballistic nanotube transistors. Analysis of experimental results from variable-temperature measurement as well as gate oxide thickness scaling studies shows that the random variation from fixed charges present on the oxide surface close to nanotubes dominates the VT variability of nanotube transistors. The VT variability of single-tube transistors has a figure of merit that is quantitatively comparable with that of current silicon devices; and it could be reduced with the adoption of improved device passivation schemes, which might be necessary for practical devices incorporating multiple nanotubes, whose area normalized VT variability becomes worse due to the synergic effects from the limited surface coverage of nanotubes and the nonlinearity of the device off-state leakage current, as predicted by the Monte Carlo simulation.
基于单壁碳纳米管的超缩放晶体管被认为是未来微处理器芯片的首选之一,因为它们提供了比传统硅技术显著更好的器件性能和缩放特性。从芯片性能的角度来看,器件变异性与器件性能对于实际应用同样重要。本文系统地研究了缩放准弹道纳米管晶体管的阈值电压(VT)变异性的起源和特征。对来自变温测量以及栅氧化层厚度缩放研究的实验结果的分析表明,接近纳米管的氧化层表面上存在的固定电荷的随机变化主导了纳米管晶体管的 VT 变异性。单管晶体管的 VT 变异性的优值与当前的硅器件相当;并且可以通过采用改进的器件钝化方案来降低其变异性,对于包含多个纳米管的实际器件,由于纳米管的有限表面覆盖率和器件关态漏电流的非线性的协同效应,其面积归一化的 VT 变异性会变得更差,这是通过蒙特卡罗模拟预测的。