Department of Organic and Nano System Engineering, Konkuk University, Seoul 05029, Korea.
Department of Chemistry, University of Kentucky, Lexington 40506, USA.
Sci Rep. 2016 Sep 12;6:33224. doi: 10.1038/srep33224.
Since the grain boundaries (GBs) within the semiconductor layer of organic field-effect transistors (OFETs) have a strong influence on device performance, a substantial number of studies have been devoted to controlling the crystallization characteristics of organic semiconductors. We studied the intrinsic effects of GBs within 5,11-bis(triethylsilylethynyl) anthradithiophene (TES-ADT) thin films on the electrical properties of OFETs. The GB density was easily changed by controlling nulceation event in TES-ADT thin films. When the mixing time was increased, the number of aggregates in as-spun TES-ADT thin films were increased and subsequent exposure of the films to 1,2-dichloroethane vapor led to a significant increase in the number of nuleation sites, thereby increasing the GB density of TES-ADT spherulites. The density of GBs strongly influences the angular spread and crystallographic orientation of TES-ADT spherulites. Accordingly, the FETs with higher GB densities showed much poorer electrical characteristics than devices with lower GB density. Especially, GBs provide charge trapping sites which are responsible for bias-stress driven electrical instability. Dielectric surface treatment with a polystyrene brush layer clarified the GB-induced charge trapping by reducing charge trapping at the semiconductor-dielectric interface. Our study provides an understanding on GB induced bias instability for the development of high performance OFETs.
由于有机场效应晶体管(OFET)半导体层中的晶界(GBs)对器件性能有很强的影响,因此大量的研究致力于控制有机半导体的结晶特性。我们研究了 5,11-双(三乙基硅基乙炔基)蒽并二噻吩(TES-ADT)薄膜中内在的 GB 对 OFET 电性能的影响。通过控制 TES-ADT 薄膜中的成核事件,很容易改变 GB 密度。当混合时间增加时,纺丝 TES-ADT 薄膜中的聚集体数量增加,随后将薄膜暴露于 1,2-二氯乙烷蒸气中会导致成核位点数量显著增加,从而增加 TES-ADT 球晶的 GB 密度。GB 的密度强烈影响 TES-ADT 球晶的角散布和结晶取向。因此,具有较高 GB 密度的 FET 比具有较低 GB 密度的器件表现出差得多的电特性。特别是,GB 提供了电荷俘获位点,这些位点负责偏压应力驱动的电不稳定性。通过用聚苯乙烯刷层进行介电表面处理,减少了半导体-介电界面处的电荷俘获,从而阐明了由 GB 引起的电荷俘获。我们的研究为高性能 OFET 的发展提供了对 GB 引起的偏置不稳定性的理解。