Capacitance-voltage characteristics of sub-nanometric AlO / TiO laminates: dielectric and interface charge densities.

Advanced amorphous sub-nanometric laminates based on TiO and AlO were deposited by atomic layer deposition at low temperature. Low densities of 'slow' and 'fast' interface states are achieved with values of 3.96 · 10 cm and 4.85 · 10 eV cm, respectively, by using a 40 nm laminate constituted of 0.7 nm TiO and 0.8 nm AlO. The sub-nanometric laminate shows a low hysteresis width of 20 mV due to the low oxide charge density of about 3.72 · 10 cm. Interestingly, such properties are required for stable and reliable performance of MOS capacitors and transistor operation. Thus, decreasing the individual layer thickness to the sub-nanometric range and combining two dielectric materials with oppositely charged defects may play a major role in the electrical response, highly promising for the application in future micro and nano-electronics applications.