Seidler Paul
IBM - Research - Zurich, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland.
J Vac Sci Technol B Nanotechnol Microelectron. 2017 May;35(3):031209. doi: 10.1116/1.4983173. Epub 2017 May 12.
A detailed procedure is presented for fabrication of free-standing silicon photonic devices that accurately reproduces design dimensions while minimizing surface roughness. By reducing charging effects during inductively coupled-plasma reactive ion etching, undercutting in small, high-aspect ratio openings is reduced. Slot structures with a width as small as 40 nm and an aspect ratio of 5.5:1 can be produced with a nearly straight, vertical sidewall profile. Subsequent removal of an underlying sacrificial silicon dioxide layer by wet-etching to create free-standing devices is performed under conditions which suppress attack of the silicon. Slotted one-dimensional photonic crystal cavities are used as sensitive test structures to demonstrate that performance specifications can be reached without iteratively adapting design dimensions; optical resonance frequencies are within 1% of the simulated values and quality factors on the order of 10 are routinely attained.
本文介绍了一种用于制造独立式硅光子器件的详细工艺,该工艺能精确再现设计尺寸,同时将表面粗糙度降至最低。通过减少电感耦合等离子体反应离子刻蚀过程中的充电效应,可减少小尺寸、高纵横比开口处的蚀刻不足。能够制造出宽度小至40 nm、纵横比为5.5:1的狭缝结构,其侧壁轮廓几乎笔直且垂直。随后通过湿法蚀刻去除下层牺牲二氧化硅层以制造独立式器件,该操作在抑制硅受到侵蚀的条件下进行。开槽的一维光子晶体腔用作敏感测试结构,以证明无需反复调整设计尺寸即可达到性能规格;光学共振频率在模拟值的1%以内,并且通常能达到10左右的品质因数。