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退火工艺对Ni(55%)Cr(40%)Si(5%)薄膜电阻性能的影响

Effect of Annealing Process on the Properties of Ni(55%)Cr(40%)Si(5%) Thin-Film Resistors.

作者信息

Cheng Huan-Yi, Chen Ying-Chung, Li Pei-Jou, Yang Cheng-Fu, Huang Hong-Hsin

机构信息

Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung 804, Taiwan.

Department of Chemical and Materials Engineering, National University of Kaohsiung, No. 700 Kaohsiung University Road, Nan-Tzu District, Kaohsiung 811, Taiwan.

出版信息

Materials (Basel). 2015 Oct 2;8(10):6752-6760. doi: 10.3390/ma8105338.

Abstract

Resistors in integrated circuits (ICs) are implemented using diffused methods fabricated in the base and emitter regions of bipolar transistor or in source/drain regions of CMOS. Deposition of thin films on the wafer surface is another choice to fabricate the thin-film resistors in ICs' applications. In this study, Ni(55%)Cr(40%)Si(5%) (abbreviated as NiCrSi) in wt % was used as the target and the sputtering method was used to deposit the thin-film resistors on Al2O3 substrates. NiCrSi thin-film resistors with different thicknesses of 30.8 nm~334.7 nm were obtained by controlling deposition time. After deposition, the thin-film resistors were annealed at 400 °C under different durations in N₂ atmosphere using the rapid thermal annealing (RTA) process. The sheet resistance of NiCrSi thin-film resistors was measured using the four-point-probe method from 25 °C to 125 °C, then the temperature coefficient of resistance could be obtained. We aim to show that resistivity of NiCrSi thin-film resistors decreased with increasing deposition time (thickness) and the annealing process had apparent effect on the sheet resistance and temperature coefficient of resistance. We also aim to show that the annealed NiCrSi thin-film resistors had a low temperature coefficient of resistance (TCR) between 0 ppm/°C and +50 ppm/°C.

摘要

集成电路(IC)中的电阻器是通过在双极晶体管的基极和发射极区域或CMOS的源极/漏极区域采用扩散方法来实现的。在晶圆表面沉积薄膜是在IC应用中制造薄膜电阻器的另一种选择。在本研究中,使用重量百分比为Ni(55%)Cr(40%)Si(5%)(简称为NiCrSi)作为靶材,并采用溅射方法在Al₂O₃衬底上沉积薄膜电阻器。通过控制沉积时间获得了厚度在30.8nm至334.7nm之间的不同厚度的NiCrSi薄膜电阻器。沉积后,使用快速热退火(RTA)工艺在N₂气氛中于400℃下对薄膜电阻器进行不同时长的退火处理。使用四点探针法在25℃至125℃范围内测量NiCrSi薄膜电阻器的薄层电阻,进而可获得电阻温度系数。我们旨在表明,NiCrSi薄膜电阻器的电阻率随沉积时间(厚度)的增加而降低,并且退火工艺对薄层电阻和电阻温度系数有明显影响。我们还旨在表明,退火后的NiCrSi薄膜电阻器具有介于0ppm/℃和+50ppm/℃之间的低电阻温度系数(TCR)。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/a97f/5455380/f9107d20be9c/materials-08-05338-g001.jpg

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