Suppr超能文献

神经电极的抗介电损伤能力可以通过使用高掺杂硅作为导电材料来提高。

Neural electrode resilience against dielectric damage may be improved by use of highly doped silicon as a conductive material.

机构信息

Department of Bioengineering, University of Utah, Salt Lake City, UT, USA.

Division of Biology, Chemistry and Materials Science, OSEL, CDRH, U.S. FDA, White Oak Federal Research Center, Silver Spring, MD, USA.

出版信息

J Neurosci Methods. 2018 Jan 1;293:210-225. doi: 10.1016/j.jneumeth.2017.10.002. Epub 2017 Oct 7.

Abstract

BACKGROUND

Dielectric damage occurring in vivo to neural electrodes, leading to conductive material exposure and impedance reduction over time, limits the functional lifetime and clinical viability of neuroprosthetics. We used silicon micromachined Utah Electrode Arrays (UEAs) with iridium oxide (IrO) tip metallization and parylene C dielectric encapsulation to understand the factors affecting device resilience and drive improvements.

NEW METHOD

In vitro impedance measurements and finite element analyses were conducted to evaluate how exposed surface area of silicon and IrO affect UEA properties. Through an aggressive in vitro reactive accelerated aging (RAA) protocol, in vivo parylene degradation was simulated on UEAs to explore agreement with our models. Electrochemical properties of silicon and other common electrode materials were compared to help inform material choice in future neural electrode designs.

RESULTS

Exposure of silicon on UEAs was found to primarily affect impedance at frequencies >1kHz, while characteristics at 1 kHz and below were largely unchanged. Post-RAA impedance reduction of UEAs was mitigated in cases where dielectric damage was more likely to expose silicon instead of IrO. Silicon was found to have a per-area electrochemical impedance >10×higher than many common electrode materials regardless of doping level and resistivity, making it best suited for use as a low-shunting conductor.

COMPARISON WITH EXISTING METHODS

Non-semiconductor electrode materials commonly used in neural electrode design are more susceptible to shunting neural interface signals through dielectric defects, compared to highly doped silicon.

CONCLUSION

Strategic use of silicon and similar materials may increase neural electrode robustness against encapsulation failures.

摘要

背景

体内神经电极的介电损伤会导致导电材料暴露和阻抗随时间降低,从而限制神经假肢的功能寿命和临床可行性。我们使用具有氧化铱(IrO)尖端金属化和聚对二甲苯 C 介电封装的硅微加工犹他电极阵列(UEA),以了解影响器件弹性和驱动改进的因素。

新方法

进行体外阻抗测量和有限元分析,以评估硅和 IrO 的暴露表面积如何影响 UEA 性能。通过激进的体外反应性加速老化(RAA)方案,在 UEA 上模拟体内聚对二甲苯降解,以探索与我们模型的一致性。比较硅和其他常见电极材料的电化学特性,以帮助为未来的神经电极设计提供材料选择信息。

结果

UEA 上硅的暴露主要影响>1kHz 频率的阻抗,而 1kHz 及以下的特性基本不变。在 RAA 后,当介电损伤更有可能暴露硅而不是 IrO 时,UEA 的阻抗降低得到缓解。硅的单位面积电化学阻抗比许多常见电极材料高>10 倍,无论掺杂水平和电阻率如何,使其最适合用作低分流导体。

与现有方法的比较

与高掺杂硅相比,神经电极设计中常用的非半导体电极材料更容易通过介电缺陷分流神经接口信号。

结论

硅和类似材料的策略性使用可能会增加神经电极对封装故障的鲁棒性。

文献检索

告别复杂PubMed语法,用中文像聊天一样搜索,搜遍4000万医学文献。AI智能推荐,让科研检索更轻松。

立即免费搜索

文件翻译

保留排版,准确专业,支持PDF/Word/PPT等文件格式,支持 12+语言互译。

免费翻译文档

深度研究

AI帮你快速写综述,25分钟生成高质量综述,智能提取关键信息,辅助科研写作。

立即免费体验