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使用高效紧束缚模空间非平衡格林函数模型的III-V族纳米线断带异质结隧穿场效应晶体管的物理特性与性能,该模型可实现百万原子纳米线模拟。

Physics and performances of III-V nanowire broken-gap heterojunction TFETs using an efficient tight-binding mode-space NEGF model enabling million-atom nanowire simulations.

作者信息

Afzalian A, Vasen T, Ramvall P, Shen T-M, Wu J, Passlack M

机构信息

TSMC, Leuven, Belgium.

出版信息

J Phys Condens Matter. 2018 Jun 27;30(25):254002. doi: 10.1088/1361-648X/aac156. Epub 2018 Apr 30.

DOI:10.1088/1361-648X/aac156
PMID:29708499
Abstract

We report the capability to simulate in a quantum-mechanical atomistic fashion record-large nanowire devices, featuring several hundred to millions of atoms and a diameter up to 18.2 nm. We have employed a tight-binding mode-space NEGF technique demonstrating by far the fastest (up to 10 000  ×  faster) but accurate (error  <  1%) atomistic simulations to date. Such technique and capability opens new avenues to explore and understand the physics of nanoscale and mesoscopic devices dominated by quantum effects. In particular, our method addresses in an unprecedented way the technologically-relevant case of band-to-band tunneling (BTBT) in III-V nanowire broken-gap heterojunction tunnel-FETs (HTFETs). We demonstrate an accurate match of simulated BTBT currents to experimental measurements in a 12 nm diameter InAs NW and in an InAs/GaSb Esaki tunneling diode. We apply our TB MS simulations and report the first in-depth atomistic study of the scaling potential of III-V GAA nanowire HTFETs including the effect of electron-phonon scattering and discrete dopant impurity band tails, quantifying the benefits of this technology for low-power low-voltage CMOS applications.

摘要

我们报告了以量子力学原子方式模拟创纪录的大型纳米线器件的能力,这些器件包含数百到数百万个原子,直径可达18.2纳米。我们采用了一种紧束缚模式空间非平衡格林函数技术,该技术展示了迄今为止最快(快达10000倍)且精确(误差<1%)的原子模拟。这种技术和能力为探索和理解由量子效应主导的纳米级和介观器件的物理特性开辟了新途径。特别是,我们的方法以前所未有的方式解决了III-V族纳米线断隙异质结隧道场效应晶体管(HTFET)中与技术相关的带间隧穿(BTBT)情况。我们展示了在直径为12纳米的InAs纳米线和InAs/GaSb埃萨基隧道二极管中,模拟的BTBT电流与实验测量值的精确匹配。我们应用紧束缚模式空间模拟,并首次深入研究了III-V族全栅纳米线HTFET的缩放潜力,包括电子-声子散射和离散掺杂杂质带尾的影响,量化了该技术在低功耗低电压CMOS应用中的优势。

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