Fermi Level Manipulation through Native Doping in the Topological Insulator BiSe.

The topologically protected surface states of three-dimensional (3D) topological insulators have the potential to be transformative for high-performance logic and memory devices by exploiting their specific properties such as spin-polarized current transport and defect tolerance due to suppressed backscattering. However, topological insulator based devices have been underwhelming to date primarily due to the presence of parasitic issues. An important example is the challenge of suppressing bulk conduction in BiSe and achieving Fermi levels ( E) that reside in between the bulk valence and conduction bands so that the topologically protected surface states dominate the transport. The overwhelming majority of the BiSe studies in the literature report strongly n-type materials with E in the bulk conduction band due to the presence of a high concentration of selenium vacancies. In contrast, here we report the growth of near-intrinsic BiSe with a minimal Se vacancy concentration providing a Fermi level near midgap with no extrinsic counter-doping required. We also demonstrate the crucial ability to tune E from below midgap into the upper half of the gap near the conduction band edge by controlling the Se vacancy concentration using post-growth anneals. Additionally, we demonstrate the ability to maintain this Fermi level control following the careful, low-temperature removal of a protective Se cap, which allows samples to be transported in air for device fabrication. Thus, we provide detailed guidance for E control that will finally enable researchers to fabricate high-performance devices that take advantage of transport through the topologically protected surface states of BiSe.