Department of Chemical Engineering , University of Illinois at Chicago , 810 S Clinton Street , Chicago , Illinois 60607 , United States.
SunEdison Semiconductor , 501 Pearl Drive , Saint Peters , Missouri 63376 , United States.
ACS Appl Mater Interfaces. 2018 Aug 8;10(31):26517-26525. doi: 10.1021/acsami.8b07655. Epub 2018 Jul 25.
Graphene intrinsically hosts charge-carriers with ultrahigh mobility and possesses a high quantum capacitance, which are attractive attributes for nanoelectronic applications requiring graphene-on-substrate base architecture. Most of the current techniques for graphene production rely on the growth on metal catalyst surfaces, followed by a contamination-prone transfer process to put graphene on a desired dielectric substrate. Therefore, a direct graphene deposition process on dielectric surfaces is crucial to avoid polymer-adsorption-related contamination from the transfer process. Here, we present a chemical-diffusion mechanism of a process for transfer-free growth of graphene on silicon-based gate-dielectric substrates via low-pressure chemical vapor deposition. The process relies on the diffusion of catalytically produced carbon radicals through polycrystalline copper (Cu) grain boundaries and their crystallization at the interface of Cu and underneath silicon-based gate-dielectric substrates. The graphene produced exhibits low-defect multilayer domains ( L ∼ 140 nm) with turbostratic orientations as revealed by selected area electron diffraction. Further, graphene growth between Cu and the substrate was 2-fold faster on SiO/Si(111) substrate than on SiO/Si(100). The process parameters such as growth temperature and gas compositions (hydrogen (H)/methane (CH) flow rate ratio) play critical roles in the formation of high-quality graphene films. The low-temperature back-gating charge transport measurements of the interfacial graphene show density-independent mobility for holes and electrons. Consequently, the analysis of electronic transport at various temperatures reveals a dominant Coulombic scattering, a thermal activation energy (2.0 ± 0.2 meV), and two-dimensional hopping conduction in the graphene field-effect transistor. A band overlapping energy of 2.3 ± 0.4 meV is estimated by employing the simple two-band model.
石墨烯具有超高迁移率的本征电荷载流子和高量子电容，这是需要基于衬底架构的石墨烯纳米电子应用的有吸引力的属性。目前大多数石墨烯生产技术都依赖于在金属催化剂表面生长，然后是易受污染的转移过程，将石墨烯转移到所需的介电基底上。因此，在介电表面上直接进行石墨烯沉积过程对于避免转移过程中与聚合物吸附相关的污染至关重要。在这里，我们提出了一种通过低压化学气相沉积在基于硅的栅介质衬底上无转移生长石墨烯的化学扩散机制。该工艺依赖于催化产生的碳自由基通过多晶铜 (Cu) 晶界的扩散及其在 Cu 与基于硅的栅介质衬底界面处的结晶。所制备的石墨烯表现出低缺陷多层畴 (L ∼ 140nm)，具有扭曲取向，这是通过选区电子衍射揭示的。此外，在 SiO/Si(111) 衬底上，Cu 与衬底之间的石墨烯生长速度比在 SiO/Si(100) 上快 2 倍。生长温度和气体成分（氢气 (H)/甲烷 (CH) 流速比）等工艺参数在高质量石墨烯薄膜的形成中起着关键作用。界面石墨烯的低温背栅电荷输运测量显示空穴和电子的迁移率与密度无关。因此，对不同温度下的电子输运分析表明，在石墨烯场效应晶体管中存在主要的库仑散射、热激活能 (2.0 ± 0.2 meV) 和二维跳跃传导。通过采用简单的双带模型，估计出能带重叠能为 2.3 ± 0.4 meV。
