用于对结终端扩展（JTE）剂量和表面电荷具有更高耐受性的碳化硅（SiC）器件的阶梯双区结终端扩展（Step-Double-Zone-JTE）

Step-Double-Zone-JTE for SiC Devices with Increased Tolerance to JTE Dose and Surface Charges.

作者信息

Huang Yifei, Wang Ying, Kuang Xiaofei, Wang Wenju, Tang Jianxiang, Sun Youlei

机构信息

Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Hangzhou 310018, China.

出版信息

Micromachines (Basel). 2018 Nov 22;9(12):610. doi: 10.3390/mi9120610.

DOI:10.3390/mi9120610

PMID:30469458

原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC6315798/

Abstract

In this paper, an edge termination structure, referred to as step-double-zone junction termination extension (Step-DZ-JTE), is proposed. Step-DZ-JTE further improves the distribution of the electric field (EF) by its own step shape. Step-DZ-JTE and other termination structures are investigated for comparison using numerical simulations. Step-DZ-JTE greatly reduces the sensitivity of breakdown voltage (BV) and surface charges (SC). For a 30-μm thick epi-layer, the optimized Step-DZ-JTE shows 90% of the theoretical BV with a wide tolerance of 12.2 × 10 cm to the JTE dose and 85% of the theoretical BV with an improved tolerance of 3.7 × 10 cm to the positive SC are obtained. Furthermore, when combined with the field plate technique, the performance of the Step-DZ-JTE is further improved.

摘要

本文提出了一种边缘终端结构，称为阶梯双区结终端扩展（Step-DZ-JTE）。Step-DZ-JTE通过其自身的阶梯形状进一步改善了电场（EF）分布。使用数值模拟对Step-DZ-JTE和其他终端结构进行了研究以作比较。Step-DZ-JTE大大降低了击穿电压（BV）和表面电荷（SC）的灵敏度。对于30μm厚的外延层，优化后的Step-DZ-JTE在JTE剂量容差为12.2×10 cm时显示出理论BV的90%，在正SC容差提高到3.7×10 cm时显示出理论BV的85%。此外，当与场板技术相结合时，Step-DZ-JTE的性能进一步提高。