Park Ye-Jin, Kwak Hyeon-Tak, Chang Seung-Bo, Kim Hyun-Seok
Division of Electronics and Electrical Engineering, Dongguk University-Seoul, Seoul 04620, South Korea.
J Nanosci Nanotechnol. 2019 Apr 1;19(4):2298-2301. doi: 10.1166/jnn.2019.15991.
We optimize various gate head structures to improve breakdown voltage characteristics of AlGaN/GaN high-electron mobility transistors by a two-dimensional device simulator based on a T-shaped gate-connected field-plate. Field-plates (FPs) alleviate electric field spikes near the gate and drain-side overlapping edges, which eventually disperse electron avalanche and charge trapping effects. Hence, the more uniform electric field distribution provides improved breakdown voltage of the device. Multiple configurations, such as extension of the FP towards the source or drain, and symmetric extension, were investigated and compared. The best results were acquired when the FP was extended towards the drain, with an optimum length of 2 m, which produced maximum breakdown voltage of 224 V and maximum transconductance of 132.5 mS/mm. Also, the optimum Si₃N₄ passivation layer thickness based on a T-shaped gate-connected FP structure was 50 nm.