He Zonglu
Faculty of Management and Economics, Kaetsu University, Tokyo, Japan.
Front Comput Neurosci. 2019 Aug 27;13:57. doi: 10.3389/fncom.2019.00057. eCollection 2019.
The mechanisms underlying an effective propagation of high intensity information over a background of irregular firing and response latency in cognitive processes remain unclear. Here we propose a SSCCPI circuit to address this issue. We hypothesize that when a high-intensity thalamic input triggers synchronous spike events (SSEs), dense spikes are scattered to many receiving neurons within a cortical column in layer IV, many sparse spike trains are propagated in parallel along minicolumns at a substantially high speed and finally integrated into an output spike train toward or in layer Va. We derive the sufficient conditions for an effective (fast, reliable, and precise) SSCCPI circuit: (i) SSEs are asynchronous (near synchronous); (ii) cortical columns prevent both repeatedly triggering SSEs and incorrectly synaptic connections between adjacent columns; and (iii) the propagator in interneurons is temporally complete fidelity and reliable. We encode the membrane potential responses to stimuli using the non-linear autoregressive integrated process derived by applying Newton's second law to stochastic resilience systems. We introduce a multithreshold decoder to correct encoding errors. Evidence supporting an effective SSCCPI circuit includes that for the condition, (i) time delay enhances SSEs, suggesting that response latency induces SSEs in high-intensity stimuli; irregular firing causes asynchronous SSEs; asynchronous SSEs relate to healthy neurons; and rigorous SSEs relate to brain disorders. For the condition (ii) neurons within a given minicolumn are stereotypically interconnected in the vertical dimension, which prevents repeated triggering SSEs and ensures signal parallel propagation; columnar segregation avoids incorrect synaptic connections between adjacent columns; and signal propagation across layers overwhelmingly prefers columnar direction. For the condition (iii), accumulating experimental evidence supports temporal transfer precision with millisecond fidelity and reliability in interneurons; homeostasis supports a stable fixed-point encoder by regulating changes to synaptic size, synaptic strength, and ion channel function in the membrane; together all-or-none modulation, active backpropagation, additive effects of graded potentials, and response variability functionally support the multithreshold decoder; our simulations demonstrate that the encoder-decoder is temporally complete fidelity and reliable in special intervals contained within the stable fixed-point range. Hence, the SSCCPI circuit provides a possible mechanism of effective signal propagation in cortical networks.
在认知过程中，高强度信息在不规则放电和反应潜伏期背景下有效传播的潜在机制仍不清楚。在此，我们提出一种SSCCPI电路来解决这一问题。我们假设，当高强度丘脑输入触发同步尖峰事件（SSEs）时，密集的尖峰分散到IV层皮质柱内的许多接收神经元，许多稀疏的尖峰序列沿着微柱以相当高的速度并行传播，最终整合为一个朝向Va层或在Va层的输出尖峰序列。我们推导了有效（快速、可靠且精确）的SSCCPI电路的充分条件：（i）SSEs是异步的（近乎同步）；（ii）皮质柱可防止重复触发SSEs以及相邻柱之间错误的突触连接；（iii）中间神经元中的传播器在时间上具有完全保真度且可靠。我们使用通过将牛顿第二定律应用于随机弹性系统而导出的非线性自回归积分过程对刺激的膜电位反应进行编码。我们引入多阈值解码器来纠正编码错误。支持有效SSCCPI电路的证据包括，对于条件（i），时间延迟增强SSEs，这表明反应潜伏期在高强度刺激中诱导SSEs；不规则放电导致异步SSEs；异步SSEs与健康神经元相关；而严格的SSEs与脑部疾病相关。对于条件（ii），给定微柱内的神经元在垂直维度上以刻板方式相互连接，这可防止重复触发SSEs并确保信号并行传播；柱状隔离避免相邻柱之间错误的突触连接；并且跨层的信号传播绝大多数倾向于柱状方向。对于条件（iii），越来越多的实验证据支持中间神经元在毫秒级保真度和可靠性方面的时间传递精度；内稳态通过调节突触大小、突触强度和膜中离子通道功能的变化来支持稳定的定点编码器；全或无调制、主动反向传播、分级电位的累加效应以及反应变异性在功能上共同支持多阈值解码器；我们的模拟表明，编码器 - 解码器在稳定定点范围内包含的特殊区间内具有时间上的完全保真度且可靠。因此，SSCCPI电路为皮质网络中有效信号传播提供了一种可能的机制。
