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FinFET铜后段制程中介电层等离子体诱导损伤的测试图案设计

Test Pattern Design for Plasma Induced Damage on Inter-Metal Dielectric in FinFET Cu BEOL Processes.

作者信息

Su Chi, Tsai Yi-Pei, Lin Chrong-Jung, King Ya-Chin

机构信息

Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, 300, Taiwan.

出版信息

Nanoscale Res Lett. 2020 May 1;15(1):96. doi: 10.1186/s11671-020-03328-7.

Abstract

High-density interconnects, enabled by advanced CMOS Cu BEOL technologies, lead to closely placed metals layers. High-aspect ratio metal lines require extensive plasma etching processes, which may cause reliability concerns on inter metal dielectric (IMD) layers. This study presents newly proposed test patterns for evaluating the effect of plasma-induced charging effect on the integrity of IMD between closely placed metal lines. Strong correlations between the plasma charging intensities and damages found in IMD layers are found and analyzed comprehensively.

摘要

由先进的CMOS铜后段制程技术实现的高密度互连,导致金属层紧密排列。高深宽比的金属线路需要大量的等离子体蚀刻工艺,这可能会引发对金属间介质(IMD)层可靠性的担忧。本研究提出了新的测试图案,用于评估等离子体诱导的充电效应对紧密排列的金属线路之间IMD完整性的影响。研究发现并全面分析了等离子体充电强度与IMD层中发现的损伤之间的强相关性。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3ef1/7195507/1d4c89bc0c9a/11671_2020_3328_Fig1_HTML.jpg

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