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界面工程多层石墨烯的薄层电阻分析:迁移率与薄层载流子浓度的关系

Sheet Resistance Analysis of Interface-Engineered Multilayer Graphene: Mobility Versus Sheet Carrier Concentration.

作者信息

Kim Min-Sik, Kim Minsu, Son Suyeon, Cho Seong-Yong, Lee Sangbong, Won Dong-Kwan, Ryu Jaechul, Bae Inseob, Kim Hyun-Mi, Kim Ki-Bum

机构信息

Department of Materials Science and Engineering, Seoul National University, Seoul 08826, Republic of Korea.

HAESUNG DS, Teheran-ro, Gangnam-Gu, Seoul 06178, Republic of Korea.

出版信息

ACS Appl Mater Interfaces. 2020 Jul 8;12(27):30932-30940. doi: 10.1021/acsami.0c04542. Epub 2020 May 26.

Abstract

Both interlayer-undoped and interlayer-doped multilayer graphenes were prepared by the multiple transfers of graphene layers with multiple Cu etching (either dopant-free or doped during etching) and transfer, and the effect of interface properties on the electrical properties of multilayer graphene was investigated by varying the number of layers from 1 to 12. In both the cases, the sheet resistance decreased with increasing number of layers from 700 to 104 Ω/sq for the interlayer-undoped graphene and from 280 to 25 Ω/sq for the interlayer-doped graphene. Further, Hall measurements revealed that the origins of the sheet resistance reduction in the two cases are different. In the interlayer-undoped graphene, the sheet resistance decreased because of the increase in mobility with the addition of inner layers, which has a low carrier density and a high carrier mobility. On the other hand, it decreased because of the increase in sheet carrier density in the interlayer-doped multilayer graphene. The mobility and carrier density variations in both the cases were confirmed by fitting with the model of Hall effect in the heterojunction. In addition, we found that surface property modification by the doping of the top layer and the formation of double-layer graphene with different partial coverages allow the separate control of carrier density and mobility. Our study provides an effective approach for controlling the properties of multilayer graphene for electronic applications.

摘要

通过多次转移石墨烯层并进行多次铜蚀刻(蚀刻过程中无掺杂或有掺杂)和转移制备了层间未掺杂和层间掺杂的多层石墨烯,并通过将层数从1变化到12来研究界面性质对多层石墨烯电学性质的影响。在这两种情况下,对于层间未掺杂的石墨烯,薄层电阻随着层数增加从700Ω/sq降低到104Ω/sq,对于层间掺杂的石墨烯,从280Ω/sq降低到25Ω/sq。此外,霍尔测量表明,这两种情况下薄层电阻降低的原因不同。在层间未掺杂的石墨烯中,薄层电阻降低是因为随着内层的增加迁移率提高,内层具有低载流子密度和高载流子迁移率。另一方面,在层间掺杂的多层石墨烯中,它降低是因为薄层载流子密度增加。通过与异质结中的霍尔效应模型拟合,证实了这两种情况下迁移率和载流子密度的变化。此外,我们发现通过顶层掺杂进行表面性质改性以及形成具有不同部分覆盖率的双层石墨烯可以分别控制载流子密度和迁移率。我们的研究为控制用于电子应用的多层石墨烯的性质提供了一种有效方法。

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