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具有多个外延层的150 - 200V 分栅沟槽功率MOSFET

150-200 V Split-Gate Trench Power MOSFETs with Multiple Epitaxial Layers.

作者信息

Chien Feng-Tso, Wang Zhi-Zhe, Lin Cheng-Li, Kang Tsung-Kuei, Chen Chii-Wen, Chiu Hsien-Chin

机构信息

Department of Electronic Engineering, Feng Chia University, Taichung 407, Taiwan.

Department of Electronic Engineering, Minghsin University of Science and Technology, Hsinchu 304, Taiwan.

出版信息

Micromachines (Basel). 2020 May 15;11(5):504. doi: 10.3390/mi11050504.

Abstract

A rating voltage of 150 and 200 V split-gate trench (SGT) power metal-oxide- semiconductor field-effect transistor (Power MOSFET) with different epitaxial layers was proposed and studied. In order to reduce the specific on-resistance (R) of a 150 and 200 V SGT power MOSFET, we used a multiple epitaxies (EPIs) structure to design it and compared other single-EPI and double-EPIs devices based on the same fabrication process. We found that the bottom epitaxial (EPI) layer of a double-EPIs structure can be designed to support the breakdown voltage, and the top one can be adjusted to reduce the R. Therefore, the double-EPIs device has more flexibility to achieve a lower R than the single-EPI one. When the required voltage is over 100 V, the on-state resistance (R) of double-EPIs device is no longer satisfying our expectations. A triple-EPIs structure was designed and studied, to reduce its R, without sacrificing the breakdown voltage. We used an Integrated System Engineering-Technology Computer-Aided Design (ISE-TCAD) simulator to investigate and study the 150 V SGT power MOSFETs with different EPI structures, by modulating the thickness and resistivity of each EPI layer. The simulated R of a 150 V triple-EPIs device is only 62% and 18.3% of that for the double-EPIs and single-EPI structure, respectively.

摘要

提出并研究了具有不同外延层的150V和200V分裂栅沟槽(SGT)功率金属氧化物半导体场效应晶体管(功率MOSFET)。为了降低150V和200V SGT功率MOSFET的比导通电阻(R),我们采用多外延(EPI)结构对其进行设计,并在相同制造工艺的基础上与其他单EPI和双EPI器件进行比较。我们发现,双EPI结构的底部外延(EPI)层可设计用于支持击穿电压,顶部外延层可进行调整以降低R。因此,与单EPI器件相比,双EPI器件在实现更低R方面具有更大的灵活性。当所需电压超过100V时,双EPI器件的导通电阻(R)不再符合我们的预期。设计并研究了一种三EPI结构,以在不牺牲击穿电压的情况下降低其R。我们使用集成系统工程技术计算机辅助设计(ISE-TCAD)模拟器,通过调制每个EPI层的厚度和电阻率,来研究具有不同EPI结构的150V SGT功率MOSFET。150V三EPI器件的模拟R分别仅为双EPI和单EPI结构的62%和18.3%。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/0a84/7281022/e820457f44ce/micromachines-11-00504-g001.jpg

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