Bae J-H, Alsing Paul M, Ahn Doyeol, Miller Warner A
Department of Electrical and Computer Engineering, University of Seoul, 163 Seoulsiripdae-ro, Tongdaimoon-gu, Seoul, 02504, South Korea.
Air Force Research Laboratory, Information Directorate, Rome, NY, 13441, USA.
Sci Rep. 2020 Sep 24;10(1):15651. doi: 10.1038/s41598-020-72469-7.
Every quantum algorithm is represented by set of quantum circuits. Any optimization scheme for a quantum algorithm and quantum computation is very important especially in the arena of quantum computation with limited number of qubit resources. Major obstacle to this goal is the large number of elemental quantum gates to build even small quantum circuits. Here, we propose and demonstrate a general technique that significantly reduces the number of elemental gates to build quantum circuits. This is impactful for the design of quantum circuits, and we show below this could reduce the number of gates by 60% and 46% for the four- and five-qubit Toffoli gates, two key quantum circuits, respectively, as compared with simplest known decomposition. Reduced circuit complexity often goes hand-in-hand with higher efficiency and bandwidth. The quantum circuit optimization technique proposed in this work would provide a significant step forward in the optimization of quantum circuits and quantum algorithms, and has the potential for wider application in quantum computation.
每个量子算法都由一组量子电路表示。量子算法和量子计算的任何优化方案都非常重要，特别是在量子比特资源数量有限的量子计算领域。实现这一目标的主要障碍是构建即使是小型量子电路也需要大量的基本量子门。在此，我们提出并演示了一种通用技术，该技术可显著减少构建量子电路所需的基本门数量。这对量子电路设计具有重要意义，并且我们在下文表明，与已知的最简单分解方法相比，对于两个关键量子电路——四量子比特和五量子比特的托佛利门，分别可将门数量减少60%和46%。降低的电路复杂度通常与更高的效率和带宽相伴。本文提出的量子电路优化技术将在量子电路和量子算法优化方面向前迈出重要一步，并且在量子计算中具有更广泛应用的潜力。
